Read Sharp AR-BD14 (serv.man5) Service Manual online
<Controller : GT32011>
Pin configurations
GT-32011
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
80
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
160
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
OEMAD*
AD(21)
VSS
VDD
AD(27)
VSS
AD(30)
AD(31)
VDATA
VCLKIN
PA GESYNC*
LINESYNC*
ROMOE*
ROMCS(0)*
ROMCS(1)*
VSS
VDD
RAS(1)*
RAS(0)*
TEST
AD
(1
4
)
AD
(1
3
)
AD
(1
2
)
AD
(1
1
)
AD
(1
0
)
VDD
VSS
AD
(9
)
AD
(8
)
AD
(7
)
AD
(6
)
AD
(5
)
AD
(4
)
AD
(3
)
AD
(2
)
AD
(1
)
AD
(0
)
VDD
VSS
VSS
BU
R
S
T
*
ADDR(
3
)
ADDR(
2
)
AL
E
RD*
RE
SE
T
WR
*
DA
TA
EN*
BU
SG
N
T
*
AC
K
*
RDCE
N*
BUS
R
EQ*
IN
T*
EA
DOE*
E
A
DDI
R
*
EA
T
O
E
*
ED
T
A
C
K
*
ED
S
*
EB
REQ*
EBG
N
T
*
EAS*
EAACK*
PIO(0)
PIO(1)
PIO(2)
PIO(3)
PIO(4)
PIO(5)
CSELECTIN*
CINIT*
CSTROBE*
CRSTROBE
CBUSY
VDD
SYSCLK
VSS
CWSTROBE
CROE*
VDD
CAUTOFD*
CPERROR
CSELECT
CWOE*
CACK*
CFAULT*
POE
PSTROBE*
N.C.
N.C.
N.C.
N.C.
VDD
VSS
IOWAIT*
DMAACK*(1)*
IORD*
IOA1
ECS*
DMAACK*(0)*
DADR(
4
)
DADR(
5
)
DADR(
6
)
VS
S
VDD
DADR(
1
0
)
IO
DAT
A(3
)
VS
S
VDD
VDD
D
M
AR
E
Q
(0
)
IO
CS(0
)
IO
CS(1
)*
IOGP
CS
(0
)*
IOGP
CS
(1
)*
IO
BE
(1
)*
IO
BE
(0
)*
D
M
AR
E
Q
(1
)
DM
A
R
E
Q
(1
5
)
DM
A
R
E
Q
(1
4
)
DM
A
R
E
Q
(1
3
)
DM
A
R
E
Q
(1
2
)
DM
A
R
E
Q
(1
1
)
DM
A
R
E
Q
(1
0
)
D
M
AR
E
Q
(9
)
D
M
AR
E
Q
(8
)
D
M
AR
E
Q
(7
)
D
M
AR
E
Q
(6
)
D
M
AR
E
Q
(5
)
D
M
AR
E
Q
(4
)
IO
DAT
A(2
)
IO
DAT
A(1
)
IO
DAT
A(0
)
DADR(
9
)
DADR(
8
)
DADR(
7
)
DADR(
1
)
DADR(
2
)
DADR(
3
)
DADR(
0
)
CAS(3)*
RAS(2)*
CAS(2)*
CAS(1)*
DWR*
CAS(3)*
ROMCS(2)*
AD(29)
AD(28)
AD(26)
AD(25)
AD(24)
AD(23)
AD(24)
AD(23)
AD(22)
AD(20)
AD(19)
AD(18)
AD(17)
AD(16)
AD(15)
AD(19)
AD(18)
AD(17)
AD(16)
AD(15)
79
IOWR*
GT32011
DRAM
Non I/L
ROM
I/L or Non I/L
DRAM
Control
RAM
Control
CPU
Interface
CPU
IDT79R3081
External Agent or
Co-processor
Co-processor
DMA Interface
Interrupt
Controller
24bit
Timer
Counter
Programmable
I/O
3cha
nne
l D
M
M
A
System
Arbiter
Parallel
Port
Control
16bit
I/O Bus
Bidirectional
Centronics
IEEE1284
eg.
Control panel
Modes:
Compatible
Nible / Byte
Nible / Byte
ECP / EPP
Peripherals:
SCSI,Enet,
PCMCIA,etc.
16bit Parallel
Port
– 28 –
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