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Fig. 4 M5105 Serial Port Block Diagram
Fig. 5 M5105 Parallel Port Block Diagram
Address Range
Function
278h
∼
27Fh
378h
∼
37Fh
3BCh
∼
3BEh
Parallel port 3
Parallel port 2
Parallel port 1
Parallel port 2
Parallel port 1
3F8h
∼
3FFh, 3E8
∼
3EF
2F8h
∼
2FFh, 2E8
∼
2EF
Serial port 1, 3
Serial port 2, 4
Serial port 2, 4
320h
∼
324h (XT)
1F0h
∼
1F7h, 3F6h, 3F7h
*
(AT)
Fixed disk select
3F2h, 3F4h, 3F5h, 3F7h
*
Flexible disk
201h
Game port select
3F3h
**
Configuration port
Table 1. I/O Address Decode
*
*
READ D7 from FDC, D0
∼
D6 from HDD; WRITE D0
∼
D7 to FDC
**
Write-only register that requires two consecutive writes to change
the data.
the data.
Rece iver
buffe r
r egister
Data
bus
buffer
D 7~D0
Select
&
contr ol
logic
A 0
A2
A1
M R
W R
R D
Addr ess
dec oder
dec oder
Function
select
select
IOR
A0~A9
A EN
VD D C
VSSD
Line
contr ol
r egister
Receiv er
shift
register
Rece iver
timin g
&
control
SIN
Divisor
latch (LS)
Divisor
latch (MS)
Ba ud
gener ator
Line
status
regisdter
Transmitter
holding
regisdter
M o d e m
control
regisdter
M o d e m
status
regisdter
Interrupt
enable
regisdter
Interrupt
I O
regisdter
Interr upt
control
logic
Transm itter
timin g
&
control
Transmitter
shift
regisdter
M o de m
control
logic
SO U T/ BAU DO U T
R T S
CT S
D T R
D S R
D C D
R I
IRQ 3 or IRQ4
Status
Control
Data
A1
A0
A0
D0~D7
RD
WR
Address
decoder
decoder
Function
select
select
IOL
A0~A9
AEN
VD DD
VSSE
5
5
ER R
SLCT
P E
BUSY
ACK
SLIN
INIT
AFD
STB
Output
drivers
drivers
4
IRQ
IRQ7
PD0~PD7
POE
Data
drivers
– 3 –
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