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Pin
Number
Pin Symbol
Pin
Type
Description
80
FGND250
O
Filter Ground 250 kb/s. This
low impedance open drain
output connects the PLL filter
for 250K (MFM)/125K (FM)
b/s or 300K (MFM)/150K (FM)
b/s to ground.
low impedance open drain
output connects the PLL filter
for 250K (MFM)/125K (FM)
b/s or 300K (MFM)/150K (FM)
b/s to ground.
79
FGND500
O
Filter Ground 500 kb/s. This
low impedance open drain
output connects the PLL filter
for 500K (MFM)/250K (FM)
b/s to ground.
low impedance open drain
output connects the PLL filter
for 500K (MFM)/250K (FM)
b/s to ground.
18
GPEN
O
Game Port Enable. This
multi-function output gives an
active low signal if I/O
address 201h is read or
written to and the XTSEL pin
was high during reset. It can
be used as a decoded chip
select for external logic that
implements the game port
function in an AT system.
multi-function output gives an
active low signal if I/O
address 201h is read or
written to and the XTSEL pin
was high during reset. It can
be used as a decoded chip
select for external logic that
implements the game port
function in an AT system.
18
GRD
O
Game Read. This multi-
function output provides an
active low signal if I/O
address 201h is selected, the
read pin is low, and the
XTSEL pin was low during
reset. It can be used as a
decoded read signal for
external logic that implements
the game port function in an
AT system.
function output provides an
active low signal if I/O
address 201h is selected, the
read pin is low, and the
XTSEL pin was low during
reset. It can be used as a
decoded read signal for
external logic that implements
the game port function in an
AT system.
17
GWR
O
Game Write. This multi-
function output provides an
active low signal if I/O
address 201h is selected, the
write pin is low, and the
XTSEL pin was low during
reset. It can be used as a
decoded write signal for
external logic that implements
the game port function in an
AT system.
function output provides an
active low signal if I/O
address 201h is selected, the
write pin is low, and the
XTSEL pin was low during
reset. It can be used as a
decoded write signal for
external logic that implements
the game port function in an
AT system.
96
HDSEL
O
Head Select. This high drive
open drain output determines
which disk drive head is
active. Low = Head 1, high
(open) = Head 0.
open drain output determines
which disk drive head is
active. Low = Head 1, high
(open) = Head 0.
16, 17
HSC0,
HSC1
HSC1
O
Hard Disk Chip Select.
These dual and multi-function
outputs provide a fixed disk
enable signal when the
addresses (Table 1) are
present on A0
These dual and multi-function
outputs provide a fixed disk
enable signal when the
addresses (Table 1) are
present on A0
∼
A9 during a
read or write access. Using
minimal hardware, these
signals control and interface
between the CPU and a fixed-
disk drive that has a
controller. HSC0 is always
used for this function after
reset, if XTSEL was high
during reset.
minimal hardware, these
signals control and interface
between the CPU and a fixed-
disk drive that has a
controller. HSC0 is always
used for this function after
reset, if XTSEL was high
during reset.
98
INDEX
I
Index. This pin signals the
beginning of a track.
beginning of a track.
Pin
Number
Pin Symbol
Pin
Type
Description
36
INIT
O
Initialize. This active low
output initializes the printer.
output initializes the printer.
13
IOL
I
I/O Address Low. This input
pin should be driven low by
external decode logic when
all I/O address bits 10
pin should be driven low by
external decode logic when
all I/O address bits 10
∼
15
are low. This signal is gated
inside the M5105 to ensure
that the I/O bus is fully
decoded.
inside the M5105 to ensure
that the I/O bus is fully
decoded.
40, 58
IRQ3, IRQ4
O
Interrupt Requests 3 and 4.
These outputs indicate serial
port interrupts. The
appropriate interrupt goes
high whenever it is enabled
via the interrupt enable
register (IER) and any of the
following serial interrupt
conditions are active: receiver
error flag set, receiver data
available, transmitter holding
register empty, and modem
status set. The interrupt is
reset low upon the
appropriate interrupt service,
disabling through IER or
master reset. IRQ4/IRQ3
present the interrupt signal if
the serial channel is
designated COM1/COM2,
respectively. Both IRQ3 and
IRQ4 can be disabled by
resetting OUT 2 low.
These outputs indicate serial
port interrupts. The
appropriate interrupt goes
high whenever it is enabled
via the interrupt enable
register (IER) and any of the
following serial interrupt
conditions are active: receiver
error flag set, receiver data
available, transmitter holding
register empty, and modem
status set. The interrupt is
reset low upon the
appropriate interrupt service,
disabling through IER or
master reset. IRQ4/IRQ3
present the interrupt signal if
the serial channel is
designated COM1/COM2,
respectively. Both IRQ3 and
IRQ4 can be disabled by
resetting OUT 2 low.
72
IRQ6
O
Interrupt Request 6. This
signals that a flexible-disk
controller operation requires
the attention of the
microprocessor. The action
required depends on the
current function of the
controller. This signal is
enabled when D3 of the drive
control register is set.
signals that a flexible-disk
controller operation requires
the attention of the
microprocessor. The action
required depends on the
current function of the
controller. This signal is
enabled when D3 of the drive
control register is set.
39
IRQ7
O
Interrupt Request 7. This
output indicates parallel port
interrupts. When enabled
(control register bit 4 = 1), the
appropriate interrupt signal
follows the ACK signal input.
output indicates parallel port
interrupts. When enabled
(control register bit 4 = 1), the
appropriate interrupt signal
follows the ACK signal input.
– 7 –
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