CDP-LSA1, MDS-LSA1, STR-LSA1 - Sony Audio Service Manual (repair manual). Page 15

15

When LINK receives music data which can be played back, it outputs the data to each playback circuit. On the other hand, if music data

is sent to LINK from the playback circuit, it is converted to packet data inside LINK.

1

Input of audio data from CD circuit

Audio data: DATA1 terminal (Pin 15)
Signal clock: BCKI terminal (Pin 13), LRCKI (Pin 14) terminals
Subcode signal: ABSO terminal (Pin 101)
Clock of subcode signal: EXCK terminal (Pin 102), WFCK terminal (Pin 103)
Error status during CD playback: C2PO terminal (Pin 100)

2

Input of audio data from MD circuit

Audio data: DATAI terminal (Pin 15)
Signal clock: BCKI terminal (Pin 13), LRCKI terminal (Pin 14)
Subcode signal: SQSY terminal (Pin 99)
For high speed downloading of ATRAC data: 512FSIN (Pin 2)...preliminary circuit/ Currently not used

Output of audio data to MD circuit

Audio data: DATAO terminal (Pin 22)
Signal clock: BCKO terminal (Pin 20), LRCKO terminal (Pin 21)

3

When the H.A.T.S. circuit is ON, the music signal is stored once in the DRAM, synchronized to internal clock of the unit, read from the

DRAM, and output to the STR circuit. When the H.A.T.S. circuit is OFF, it will be output to the STR circuit immediately.

Audio data input from the STR circuit

Audio data: DIN terminal (Pin 17)

Audio data output to the STR circuit (When H.A.T.S. is OFF)

Audio data: DOUT terminal (Pin 18)
For error flag waveform shaping: EOF terminal (Pin 23)

Audio data input/output with DRAM (When H.A.T.S. is ON)

Audio data: DATA terminal (Pins 127 to 143)
Address signal: Terminal A (Pins 111 to 121)
DRAM control signal: XRAS/XCAS/XOE/XWE terminals (Pins 122 to 125)

Audio data output to STR circuit (When H.A.T.S. is ON)

Audio data: DATA terminal (Pin 22)
Signal clock: 512FSI terminal (Pin 2), BCKO terminal (Pin 20), LRCKO terminal (Pin 21)