Read Sharp UP-3500 (serv.man29) Service Manual online
UP-3500 (V)
HARDWARE DESCRIPTION
– 26 –
(5) MCR
The MCR of 3 tracks is optionally available.
■ Signal name descriptions
8251
㬍3
R C P 1
R D D 1
C L S 1
R C P 2
S H 7 7 60
R D D 2
C L S 2
R C P 3
IR L 1
R D D 3
C M T _C T R 1
C L S 3
EX IN T 3#
MCRINT#
EXINT3#
FPGAINT#
Interrupt controller
FPGA
RCVRD Y 1
RCVRD Y 2
RCVRD Y 3
RCVRD Y 1
RCVRD Y 2
RCVRD Y 3
RCP1
Track 1 clock pulse
RDD1
Track 1 data signal
CLS1
Track 1 card detection signal
RCP2
Track 2 clock pulse
RDD2
Track 2 data signal
CLS2
Track 2 card detection signal
RCP3
Track 3 clock pulse
RDD3
Track 3 data signal
CLS3
Track 3 card detection signal
RCVRDY1
Track 1 data receive detection signal
RCVRDY2
Track 2 data receive detection signal
RCVRDY3
Track 3 data receive detection signal
MCRINT#
Interrupt signal by OR-composition of RCVRDY and SYNC input
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