Read Sharp UP-3500 (serv.man29) Service Manual online
UP-3500 (V)
HARDWARE DESCRIPTION
– 18 –
4. BUS
D15
-0
CPU
SDRA
LCDC
M
D31- 0
D31-0
D15-0
D15-0
D31- 0
D15
-0
SRAM
SRAM
16Mbit
2
SRAM
SRAM
16Mbit
2 or 4
FLASH
D15
-0
ENABLE
RD#
ENABLE
D15
-0
FPGA
LANC
ADDRESS
A14
-2
A10
-0
BA1, BA0,
SUB PWB
φ Direction ENABLE
A22
-1
DONE
A22
-1
D15/A-1
A0
2.5V
ψ3.3V
A0
A21-
0
D14
-
0
(Expansion)
Bidirectionalb
uff
er
Buffer
Connector
V
R
A
M
Except for the
SDRAM & LCDC area
SDRAM & LCDC area
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