Read Sharp CD-MD3000 (serv.man25) Service Manual online
CD-MD3000H/CD-MD3000W
– 108 –
Figure 108 BLOCK DIAGRAM OF IC
1
V
SSA(ADC)
AD converter analog ground
2
V
DDA(ADC)
AD converter analog power
3
VINL
AD converter input (left)
4
Vref(A)
AD converter reference voltage
5
VINR
AD converter input (right)
6
V
ADCN
AD converter reference voltage N
7
V
ADCP
AD converter reference voltage P
8*
MC1
Mode control 1 (Pulled-down)
9*
MP1
Multi-purpose pin 1
10
V
DDD
Digital power
11
V
SSD
Digital ground
12
SYSCLK
System clock 256fs, 384fs, 512fs
13
MP2
Multi-purpose pin 2
14
MP3
Multi-purpose pin 3
15
MP4
Multi-purpose pin 4
16
BCK
Bit clock input
17
WS
Word select input
18
DATAO
Data output
19
DATAI
Data input
20*
MP5
Multi-purpose pin 5 (Pulled-down)
21*
MC2
Mode control 2 (Pulled-down)
22
AV
SS(DAC)
DA converter analog ground
23
AV
DD(DAC)
DA converter analog power
24
VOUTR
DA converter output (right)
25
V
DDO
Opeamp power
26
VOUTL
DA converter output (left)
27
V
SSO
Opeamp ground
28
Vref(D)Input
AD converter reference voltage
IC1701 VHiUDA1345/-1: AD/DA Converter (UDA1345)
Pin No.
Function
Terminal Name
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
VDDA(ADC) VSSA(ADC) VADCP VADCN
Vref(A)
VINR
MC1
MC2
MP5
MP2
MP3
MP4
SYSCLK
VOUTR
Vref(D)
VSSA(DAC)
VDDA(DAC)
VSSO
VDDO
VOUTL
MP1
DATAI
WS
BCK
DATAO
VSSD
VDDD
VINL
ADC
0dB/6dB
switch
ADC
DECMATION FILTER
DC-CANCELLATION FILTER
DIGITAL
INTERFACE
L3-BUS
INTERFACE
DSP FEATURES
INTERPOLATION FILTER
NOISE SHAPER
DAC
DAC
UDA1345
2
3
4
5
1
7
8
9
6
12
13
14
15
11
17
18
19
10
16
22
23
24
25
21
27
28
20
26
