KX-NS5170XSX, KX-NS5170X-SX - Panasonic PBX Service Manual (repair manual). Page 8

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8
KX-NS5170X/KX-NS5170SX
• Local highway interface
Accommodates 2.048, 4.096, and 8.192MHz highways (Up to 64 time slots).
• Local gain control
Controls the gain of the local highway up-and-down 64ch in 1db step arbitrarily.
•  Local TSW
Exchanges the time slots between CT bus (1024ch) and local highway (64ch).
• Local gain control
Controls the gain of the local highway up-and-down 64ch in 1db step arbitrarily.
•  PT interface
Allows APT/DPT interface to be selected for each port.
• CODEC interface
Can connect up to four Infineon-manufactured PEB2466, and is intended for enabling the line control.
• GPIO interface
Parallel interface that is arbitrarily programmable bidirectionally.
5.2.2.
Line-System Circuit
5.2.2.1.
PT Interface
• APT data communications
Control data is transmitted from the DTL terminal of ASIC, then is output to APT (between D1 and D2) by way of the driver U105
and the pulse transformer T100.
The control data transmitted from APT is input to the DR terminal of ASIC by way of the pulse transformer T100 and R126. 
ASIC compares VREF+ with the input waveform, and receives a valid pulse.
• DPT data communications
Bch/Dch/Cch  data  is  transmitted  from  the  DTL/DTH  terminal  of  ASIC,  and  the  AMI-converted  pulse  signal  is  output  to
DPT (between D1 and D2) by way of the driver U105 and the pulse transformer T100. 
The Bch/Dch/Cch data transmitted from APT is input to the DR terminal of ASIC by way of the pulse transformer T100 and R126.
ASIC compares VREF+ and VREF- with the input wave- form, and receives a valid pulse.
• Bch communications
Communicated by the PCM data (64kbps Å~ 2) connected from the local highway by ASIC.
Used mainly for the audio signal of DPT.
• Dch communications
Communicated by the data (16kbps) protocol-converted by the HDLC controller in ASIC.
Used mainly for the control signal of DPT.
• Cch communications
Communicated by the data (8kbps) converted by the serial/parallel-converting circuit in ASIC.
Used mainly for recognizing the terminal model.
DG
DTH[0]
C105A
DTL[0]
DG
C104A
R127A
C103A
R125A
DG
R123A
DR[0]
R122A
R120A
+5V
R121A
R124A
T100A
1
2
4
5
6
7
10
9
8
C107A
C106A
R117A
R118A
R119A
R126A
C102A
U105A
5
3
4
U105A
2
6
1
C108A
C109A
D1
D2
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