BB-HCM705CE - Panasonic Video Monitoring Service Manual (repair manual). Page 12

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BB-HCM705CE
4 Technical Descriptions
4.1.
CPU Peripheral Block
CPU (IC101)
Operating Power Supply: 3.3 V (for I/O), 1.8 V (for DDR2SDRAM), 1.2 V (for Core) 
Package: 433 pin Ball BGA
Operation Outline: The LSI component encodes image signals input by a camera to JPEG, MPEG or H.264 format, and sound
signals to AAC-LC. Data is distributed to a terminal connected to an IPv4 or IPv6 network using a network server function rea-
lised by software processing in a built-in processor.
EEPROM (IC201), Audio Codec(IC401) and Real Time Clock IC (IC402) are accessed by I2C I/F. Ethernet PHY (IC301) is
accessed by MII (Media Independent Interface) I/F.
Flash Memory (IC102)
Operating Power Supply: 3.3 V 
Package: 48 pin Ball BGA
Capacity: 64 Mbit
Access Time: 70 ns
Operation Outline: The program for the network camera to activate the CPU, MAC address and user settings are stored.
Version Upgrade with Ethernet interface is possible.
DDR2 SDRAM (IC103/IC104)
Power Supply Voltage: 1.8 V 
Package: 84 pin Ball BGA
Capacity: 512 Mbit
Operation Outline: Two SDRAMs (IC103/104) are available for CPU processing work, storage of temporary image data.
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