Read Sony MEX-BT5100 Service Manual online
MEX-BT5100
49
• IC Pin Function Description
SERVO BOARD IC2 TC94A70FG-002 (RF AMP, DIGITAL SERVO, DIGITAL SIGNAL PROCESSOR)
SERVO BOARD IC2 TC94A70FG-002 (RF AMP, DIGITAL SERVO, DIGITAL SIGNAL PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
AVSS3
-
Ground terminal
2
RFZI
I
RF ripple zero crossing signal input terminal
3
RFRP
O
RF ripple signal output terminal
4
SBAD/RFDC/ETE
O
Subbeam addition signal output/RF peak detecting phase signal output for hologram selec-
tion terminal Not used
tion terminal Not used
5
FEI
I
Focus error signal input terminal Not used
6
TEI
I
Tracking error signal input terminal
7
TEZI
I
Tracking error signal zero crossing input terminal
8
AVDD3
-
Power supply terminal (+3.3 V)
9
FOO
O
Focus servo equalizer signal output terminal
10
TRO
O
Tracking servo equalizer signal output terminal
11
VREF
I
Reference voltage (+1.65V) input terminal
12
FMO
O
Feeding servo equalizer signal output terminal
13
DMO
O
Disc servo equalizer signal output terminal
14
VSSP3
-
Ground terminal
15
VCOI
I
DSP VCO control voltage input terminal
16
VDDP3
-
Power supply terminal (+3.3 V)
17
VDD1-1
-
Power supply terminal (+1.5 V)
18
VSS1-1
-
Ground terminal
19
FGIN
I
FG signal input terminal for CAV Not used
20, 21
IOO (/HSO),
IOI (/UHSO)
IOI (/UHSO)
-
Not used
22
XVSS3
-
Ground terminal
23
XI
I
System clock input terminal (16.9344 MHz)
24
XO
O
System clock output terminal (16.9344 MHz)
25
XVDD3
-
Power supply terminal (+3.3 V)
26
DVSS3-1
-
Ground terminal
27
RO
O
R channel data (positive) output terminal
28
DVDD3
-
Power supply terminal (+3.3 V)
29
DVR
I
Reference voltage (+1.65V) input terminal
30
LO
O
L channel data (positive) output terminal
31
DVSS3-2
-
Ground terminal
32
VDDT3-1
-
Power supply terminal (+3.3 V)
33
VSS1-2
-
Ground terminal
34
VDD1-2
-
Power supply terminal (+1.5 V)
35
VDDM1
-
Power supply terminal (+1.5 V)
36
MSTBY
I
S-RAM standby mode control signal input from the CD system control
37
/RST
I
Reset signal input from the CD system control
38 to 41
BUS0 to BUS3
I/O
Bus data input/output with the CD system control
42
BUCK (CLK)
I
Bus clock signal input from the CD system control
43
/CCE
I
Chip enable signal input from the CD system control
44
TEST
I
Setting terminal for test mode Normally fi xed at "L"
45
IRQ
I
Interrupt request signal input terminal Not used
46, 47
AOUT3 (PO4),
AOUT2 (PO5)
-
Not used
48
PIO0
O
Request signal output to the CD system control
49, 50
PIO1, PIO2
-
Not used
51
PIO3
I
Muting on/off control signal input from the CD system control "L": mute
52
VSS1-3
-
Ground terminal
53
VDDT3-2
-
Power supply terminal (+3.3 V)
54
SBSY
-
Not used
55
SBOK/FOK
-
Not used
56
IPF
-
Not used
57
SFSY/LOCK
-
Not used
58
ZDET
O
Zero detection signal output to the CD system control
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