Read Sony SDP-EP70 / SDP-EP90ES Service Manual online
– 71 –
Pin No.
Pin Name
I/O
Function
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Decoder select input
H: MPEG decode/L: AC-3 decode
Not used
LR clock output for DSP56009 (MPEG: 4 Fs/AC-3: 1 Fs) H: L channel
Frame sync pulse output (1 Fs) for write data to DSP56009
Not used
+5V power supply
Not used
Clock output for data write to DSP56009 (MPEG: 256 Fs/AC-3: 64 Fs)
Write data (DSP56009) output
Fix at “L”
Data input to DSP56002
Bit clock input for Data input from DSP56002
L/R ch switching clock input for Data input from DSP56002
Master clock delay input
Master clock input
Ground
64 Fs clock output (Not used)
1 Fs clock output (Not used)
1 Fs clock output (Not used)
L/R ch clock phase control input (Fix at “L”)
256 Fs master clock phase control input (Fix at “L”)
Not used
Digital signal processor select mode input (Fix at “L”)
Not used
Write data (DSP56002) 1 bit delay output (L: DI2, H: DIN)
Not used
+5V power supply
Not used
Frame sync pulse output for write data to DSP56002
Not used
Fixed at “L”
Digital signal processor data input select input (L: DI2, H: DIN)
Fixed at “L”
L/R ch clock timing select (Fixed at “L”)
Read data (DSP56002) input
Word sync pulse output (8 Fs) for read data to DSP56002
Clock output (256 Fs) for read data to DSP56002
Ground
Fixed at “L”
Bit clock output for write data to DSP5602
Frame sync pulse output (1 Fs) for read data to DSP56002
L/R ch clock output for wirte data to DSP56002
Not used
LAC3
—
WSR
GPIO0
—
VCC
—
SCKR
SDI0
DI2
DI3
DIN
BCKI
LRCK
DCK
MCK
GND
BCKO
LRCKO
RLRCK
LRPH
MCPH
—
HALM
DO1
SRD
—
VCC
—
SC1
DO4
HDO4
HDI1
H2X1
HIIS
STD
SC2
SCK
GND
DTI
SC0
TXD
RXD
—
I
–
O
O
–
–
–
O
O
I
I
I
I
I
I
I
—
O
O
O
I
I
–
I
O
O
–
–
–
O
O
I
I
I
I
I
O
O
–
I
O
O
O
–
• IC1006 Serial Communication Format Converter (CXD8751Q)
Click on the first or last page to see other SDP-EP70 / SDP-EP90ES service manuals if exist.