Read Sony SDP-EP70 / SDP-EP90ES Service Manual online
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Pin No.
Pin Name
I/O
Function
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
Power supply for data bus
Data input/output to S-RAM
Power supply for interrupt/mode control
Ground for interrupt/mode control
Ground for data bus
Data input/output to S-RAM
Power supply for data bus
Data input/output to S-RAM
Ground for data bus
Data input/output to S-RAM
Ground for data bus
Data input/output to S-RAM
Power supply for data bus
Data input/output to S-RAM
Ground for data bus
Data input/output to S-RAM
Mode select C/Non-maskable interrupt request input
Mode select B/External interrupt request input
Mode select A/External interrupt request/stop recovery input
Ground for clock
Output clock output (Not used)
Power supply for clock
Rest input
Output clock polarity control input
Power supply for analog PLL
PLL filter capacitor input
Ground for analog PLL
Phase and frequeny locked output
PLL initialization input (Fixd at “L”)
Crystal output (Not used)
GNDD
D6
D7
D8
D9
VDDQ
GNDQ
GNDD
D10
D11
VCCD
D12
D13
GNDD
D14
D15
D16
D17
GNDD
D18
D19
VCCD
D20
D21
GNDD
D22
D23
MODC/NMI
MODB/IRQB
MODA/IRQA
GNDCK
CKOUT
VCCCK
RESET
CKP
VCCP
PCAP
GNDP
PLOCK
PINIT
XTAL
–
I/O
I/O
I/O
I/O
–
–
–
I/O
I/O
–
I/O
I/O
–
I/O
I/O
I/O
I/O
–
I/O
I/O
–
I/O
I/O
–
I/O
I/O
I
I
I
–
O
–
I
I
–
I
–
O
I
O
• Abbreviation
PLL : Phase Locked Loop
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