Read Sony SCD-XB780 Service Manual online
SCD-XB780
21
21
53 55 52 54 12
50
49
48
24
75
100
25
4 6 5 7 15 79 80 76 77
10 11 13
34 35 36 9 26
33 37
71
3
2
138
68
64
17
14
65
67
66
71
72
69
16
43 44
64
58
85 84 12 22 23
117
111
7 8
89 – 96
14 – 21
A0 – A7
D0 – D7
142
144
140
135
147
148
150
151
137
153 146 155 163 158 160
164
26
46
51
54
62
63
49
48
53
23
162
29
44, 41, 39, 35,
32, 30, 27, 24
31, 34, 37,
40, 43, 45
59, 56, 60
157
159
93
92
94
76
78
95
33
34
170
17
18
35
21 – 24, 27 – 32
79, 80, 82 – 87,
89, 91
41 – 44, 46 – 49
96, 97, 99, 101,
102, 104 – 106
2 – 5, 7 – 10
5, 7, 9 – 14
172 – 176, 1, 2, 4
66 – 69, 71,
73 – 75
169
167
109
107
16
21
20
19
18
17
113 114 115
2
FILTER
ASYMMETRY
CORRECTOR
EFM
DEMODULATOR
32K
RAM
D/A
DIGITAL
INTERFACE
CLOCK
GENERATOR
ERROR
CORRECTOR
DIGITAL
OUT
SUBCODE
PROCESSOR
DIGITAL CLV
PROCESSOR
PROCESSOR
CPU INTERFACE
DIGITAL PLL
INTERNAL BUS
C4M
XTSL
DIGITAL SIGNAL
PROCESSOR
IC509 (2/2)
RFAC
RFAC
ASYI
ASYO
ASYO
FILO
PCO
XPCK
FILI
CLTV
D+3.3V
XTAO
XTAI
PCMD
WDCK
DOUT
XRST
C2PO
LRCK
BCK
MDAT
LRCK
BCLK
XRST DVD
WAVE SHAPER
Q302
OPTICAL
TRANSCEIVER
IC309
18
17
19
20
DIGITAL (CD)
OUT OPTICAL
DIGITAL (CD)
OUT COAXIAL
J303
(Page 22)
(Page 22)
(Page 23)
(Page 22)
21
(Page 22)
SD0 – SD7
SDEF
22
(Page 22)
23
(Page 22)
24
(Page 22)
25
(Page 22)
RFAC
768FS (33.8688MHz)
MDAT, BCLK, LRCK
XRST CD, MUTE CD, XRST DVD
HOST INTERFACE
DLRC
DDAT
MA10/MNT1
XMOE
XCAS
MA0 – MA9
MDB8, MDB9,
MDBA – MDBF
MDB0 – MDB7
DASYO
DASYI
ASF1
ASF2
XRAS
XMWR
MA11/MNT2
DBCK
XSAK,
XSHD,
XDCK,
XDCK,
XSRQ
WPK
XTAL
HDB0 –
HDB7
HDB7
HDB8
HDB9
HDBA –
HDBF
HDBF
HA0 –
HA2
HA2
XSAK
XHRS
XSRQ
XDCK
XSHD
HCS1
HCS0
HINT
REDY
• SIGNAL PATH
: SACD PLAY
: CD PLAY (ANALOG)
: CD PLAY (DIGITAL OUT)
ATAPI
PACKET FIFO
ATAPI
REGISTER
DMA
FIFO
DAC
INTERFACE
CD ESP
OE
UCAS
WE
RAS
LCAS
A0 – A9
I/O8 – I/O15
I/O0 – I/O7
D-RAM
IC706
AUTHENTICATION
CPU
INTERFACE,
DMA
CONTROLLER
XTL1
XTL2
XTAL
APEO
GFS
XWAIT
XRD
XWR
XCS
XINT0
XINT0
XINT1
DATA BUS
ADDRESS BUS
DATA BUS
ADDRESS BUS
INTEGRATOR
IC703 (1/2)
16
(Page 22)
15
(Page 22)
14
(Page 22)
10
(Page 20)
5
(Page 20)
XHRD, XHWR
A0
D0 – D7
SPDA, F JMP1/2
LDON
11
(Page 20)
SPIN
F JMP1
SPDA
F JMP2
TO SERVO AUTO
SEQUENCER
LOCK
MDP
DATA
SQCK
WFCK
EMPH
MUTE
GFS
RFCK
SQSO
EXCK
SBSO
SCOR
SENS
XLAT
CLOK
LOCK CD
DATA CD
CLOK CD
XLAT CD
SENS CD
SCOR CD
SQSO CD
SQCK CD
GFS CD
3
DOCTRL
LD ON
SPDA
APDO
JITTER
GFS DVD
XRD
XWR
XCS DVD
INIT0 DVD
INIT1 DVD
XHRD
XHWR
XCS
XINT0
XINT1
FCS JMP1
FCS JMP2
SPINDLE MOTOR DRIVE
IC708 (2/2)
SYNC
CONTROL
SUBCODE
DEINTERLEAVE & ECC
DESCRAMBLE
BUFFER
IC708 (1/2)
FFM
DEMODULATOR
RF
ASSYMMETRY
PLL
FILTER
ANALOG
MIXER
SPINDLE
CONRTOL
CD DSP INTERFACE
MDSOUT
MDIN1
MDPOUT
CLVS
SPO
MDIN2
WFCK
SCOR
SBIN
EXCK
XRCI
GSCOR
C2PO
LRCK
BCLK
MDAT
XRST
WFCK
SCOR
SBSO
EXCK
A0 – A7
D0 – D7
SACD DECODER
IC701
RFIN
CPU
IC901 (1/3)
63
MD2
MAIN DATA ECC & EDC
DVD-ROM CD-ROM
59
1
(Page 20)
SP ERR
SP ERR
DMA CONTROLLER
(PRIORITY RESOLVE & SEQUENCER)
(Page 20)
XRST CD
MUTE CD
XHRD
XHWR
XCS
XINT0
XINT0
XINT1
XSAK
XSRQ
XDCK
XSHD
DVC BUFFER
IC703 (2/2)
DVC
(+1.65V)
A+3.3V
5-2.
BLOCK DIAGRAM – SERVO Section –
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