Read Sony SCD-1 / SCD-777ES Service Manual online
10
The check land for confirming PLL circuit operation is also around the center of the main board. If the circuit does not operate normally
owing to poor soldering or the like, jitter values will be outside the specified value.
Normally, it is not necessary to confirm these clock jitters.
Normally, it is not necessary to confirm these clock jitters.
Table 2-3. Clock Jitter
Clock
Indication on Board Indication on Service Manual Pattern Diagram
Terminal Position
Specified value
27MHz
21K-REF
TP (D1)
Pin 4 of IC713
Jitter for 2 signals is 30ns or less
21K-REF
TP (D2)
Pin 5 of IC713
512fs
REF-LRCK
TP711
Pin 4 of IC715
Jitter for 2 signals is 15ns or less
VAR-LRCK
TP (B)
Pin 5 of IC715
Fig. 2-3. Main Board’s Test Points
JL925:22MHz
JL926:27MHz
TP(D1):21K-REF
TP(D2):21K-VAR
TP704:REF-LRCK
TP711:REF-LRCK
TP(B):VAR-LRCK
IC702
IC703
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