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33
LC-20B6E
P3
0
to P3
7
A
8
to A
15
P4
0
to P4
7
I/O port P3
I/O port P4
This is an 8-bit I/O port equivalent to P0.
These pins output 8 middle-order address bits (A
8
–A
15
).
This is an 8-bit I/O port equivalent to P0.
Input/output
Output
Input/output
Output
Output
Output
CS
0
to CS
3
,
A
16
to A
19
These pins output CS
0
–CS
3
signals and A
16
–A
19
. CS
0
–CS
3
are chip
select signals used to specify an access space. A
16
–A
19
are 4 high-
order address bits.
I/O port P5
P5
0
to P5
7
This is an 8-bit I/O port equivalent to P0. In single-chip mode, P5
7
in
this port outputs a divide-by-8 or divide-by-32 clock of X
IN
or a clock of
the same frequency as X
CIN
as selected by software.
Output
Output
Output
Output
Output
Input
Output
Output
Output
Output
Input
Output
Input
Input
WRL / WR,
WRH / BHE,
RD,
BCLK,
HLDA,
HOLD,
WRH / BHE,
RD,
BCLK,
HLDA,
HOLD,
ALE,
RDY
RDY
Output WRL, WRH (WR and BHE), RD, BCLK, HLDA, and ALE
signals. WRL and WRH, and BHE and WR can be switched using
software control.
■ WRL, WRH, and RD selected
signals. WRL and WRH, and BHE and WR can be switched using
software control.
■ WRL, WRH, and RD selected
With a 16-bit external data bus, data is written to even addresses
when the WRL signal is “L” and to the odd addresses when the WRH
signal is “L”. Data is read when RD is “L”.
■ WR, BHE, and RD selected
Data is written when WR is “L”. Data is read when RD is “L”. Odd
addresses are accessed when BHE is “L”. Use this mode when using
an 8-bit external data bus.
While the input level at the HOLD pin is “L”, the microcomputer is
placed in the hold state. While in the hold state, HLDA outputs a “L”
when the WRL signal is “L” and to the odd addresses when the WRH
signal is “L”. Data is read when RD is “L”.
■ WR, BHE, and RD selected
Data is written when WR is “L”. Data is read when RD is “L”. Odd
addresses are accessed when BHE is “L”. Use this mode when using
an 8-bit external data bus.
While the input level at the HOLD pin is “L”, the microcomputer is
placed in the hold state. While in the hold state, HLDA outputs a “L”
level. While the input level of the RDY pin is “L”, the microcomputer is in
the ready state. ALE output is indefinite.
Input/output
Signal name
Function
Pin name
I/O type
Input/output
I/O port P6
P6
0
to P6
3,
P6
7
This is an 5-bit I/O port equivalent to P0. When set for input in single-
chip, microprocessor and memory expansion modes, the user can
specify in units of four bits via software whether or not they are tied to a
pull-up resistor. Pins in this port also function as UART0 and multi-
chip, microprocessor and memory expansion modes, the user can
specify in units of four bits via software whether or not they are tied to a
pull-up resistor. Pins in this port also function as UART0 and multi-
master I
2
C-BUS interface 0 I/O pins as selected by software.
Input/output
Input/output
Input/output
I/O port P7
I/O port P9
I/O port P10
P7
0
to P7
7
P9
0
to P9
4
P10
2
to P10
7
This is an 8-bit I/O port equivalent to P6 (P7
0
and P7
1
are N-channel
open-drain output). Pins in this port also function as timers A2 and A3,
UART2, multi-master I
UART2, multi-master I
2
C-BUS interface 0, or H
SYNC
counter I/O pins as
selected by software.
This is an 5-bit I/O port equivalent to P6. Pins in this port also function
as Timer B0 to B2 input pins, D-A converter output pins, or multi-master
as Timer B0 to B2 input pins, D-A converter output pins, or multi-master
I
2
C-BUS interface 1 I/O pins, RXD2, and TXD2 pins. P9
2
can be set
using software to function as the R0 outout pin of digital RGB output.
This is an 6-bit I/O port equivalent to P6. Pins in this port also function
as A-D converter input pins. P10
as A-D converter input pins. P10
5
to
P107
can be set using software to
function as the B2, G2, and R2 outout pins of digital RGB output.
G
Input/output
I/O port P8
P8
2
, P8
3
,
P8
6
, P8
7
P8
2
, P8
3
, P8
6
and P8
7
are I/O ports with the same functions as P6.
Using software, P8
2
and P8
3
can be made to function as the I/O pins for
the input pins for external interrupts. P8
6
and P8
7
can be set using
software to function as the I/O pins for a sub-clock generation circuit,
0
and B
0
output pins of digital RGB output. In this case, connect a
quartz oscillator between P8
6
(X
COUT
pin) and P8
7
(X
CIN
pin).
R, G, B
OSC1/
OSCHLF
OSCHLF
OSC2
CV
IN1
V
HOLD1/
V
HOLD2
HLF1/HLF2
TVSETB
OSD output
Clock for
OSD
OSD
Clock for OSD
I/O for data
slicer
slicer
Test input
Output
Input
Output
Input
Input
Input
These are OSD output pins (Digital/analog outputs selectable).
OSD clock input or filter pin.
This is an OSD clock output pin.
Input composite video signal through a capacitor.
Connect a capacitor between V
HOLD
and Vss.
Connect a filter using of a capacitor and a resistor
between HLF and Vss.
between HLF and Vss.
This is a test input pin. Fix it to “L.”
OUT1, OUT2
These are OSD output pins (digital output).
OSD output
Output
Input/output
CV
IN2
Hsync
Synchronous
signal input for
OSD
signal input for
OSD
Input
This is horizontal synchronous signal pin for OSD.
Vsync
Synchronous
signal input for
OSD
signal input for
OSD
Input
This is vertical synchronous signal pin for OSD.
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