Read Sharp UP-X200 (serv.man9) Service Manual online
UP-X200
System Block Diagram
– 8 –
6-3. BATTERY CAPACITY TABLE
*
"Fatal" is described in a different section: for details refer to the rele-
vant section.
Hard control: This refers to fatal detection by GPIO interruption as
opposed to voltage detection by software.
CHAPTER 7. SYSTEM BLOCK DIAGRAM
7-1. SYSTEM BLOCK DIAGRAM
Level
Capacity Level
Remaining
Detected Voltage
B/L ON
B/L OFF
Good
100%
-
-
90%
4.02V
4.05V
80%
3.92V
3.95V
70%
3.87V
3.90V
60%
3.79V
3.82V
50%
3.72V
3.75V
40%
3.70V
3.73V
Low
30%
3.68V
3.71V
20%
3.66V
3.69V
Very Low
10%
3.58V
3.61V
Fatal
0%
Hard control (3.40V) Hard control (3.40V)
Intel
Application
Processor
PXA255-400MHz
CF TYPE
SS WIRELESS
LAN CARD
LCD
TG
LCD
480 x 640
SD
TOUCH
PANEL
SP
UART
JTAG
RTC
18 KEY/
TRIGGER KEY
USB
HOST
TYPE A
Buzzer
SDRAM
128MB
DiskOnChip
64MB
SHARP
NOR Flash
1MB
SCOOP2
HOST BUS
TOSHIBA
TC6393XB
GENERAL-
PURPOSE
GA
ZEN0599
SPI
CODEC
Wolfson
WM9712L
AC97
MI
HP
HS
GPIO
SPI
PWM
FUART
Development Only
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