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2. Description of main LSI’s
2-1. CPU (HD6415108FX)
1) Pin configuration
HD6415108FX pin configuration
Fig. 2-1
RES
NMI
VSS
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
VSS
A0
A1
A2
A3
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
STBY
MD
2
MD
1
MD
0
VC
C
RF
S
H
LWR
HWR
RD
AS
E
VSS
XTAL
EXTAL
VSS
TXD
2
RX
D2
TXD
1
RX
D1
SC
K2
IR
Q
2
IR
Q
1
IR
Q
0
VC
C
AVC
C
P7
3
AN
3
11
2
11
1
11
0
10
9
10
8
10
7
10
6
10
5
10
4
10
3
10
2
10
1
10
0
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
TMCI
P42
P43
FTI1
P45
FTI2
P47
VSS
P50/FTCA1
P51
P52
P53
P54
FMRS
P56
P57/STOP
P60/ER
P61/DR
P62/CS
P63/CD
P64/RR
P65/RS
P66
P67
VSS
AVSS
AN0
AN1
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
78
80
81
82
83
84
A8
A9
A1
0
A1
1
A1
2
A1
3
A1
4
A1
5
VSS
A1
6
A1
7
A1
8
A1
9
A2
0
A2
1
A2
2
A2
3
VSS
WA
IT
BAC
K
BR
EQ
P3
3
P3
4
P3
5
P3
6
P3
7
VC
C
P4
0
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
X
10
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