Read Sharp ER-A310 (serv.man2) Service Manual online
11. Clock generator circuit
X2:
4.19MHz is inputted as the CPU main clock.
X1:
32.768KHz is inputted as the time renewal clock.
12. Buzzer circuit
This circuit sounds buzzer with the BUS signal from the CPU.
13. Reset circuit
The reset signal is formed with VOC and VDD. The /RESET signal is
also outputted when the mode switch is at SRV position.
also outputted when the mode switch is at SRV position.
IC2
CPU
X1
32.768KHz
C14
33P
33P
C16
22P
22P
R51
330K
R93
1M
X2
4.19MHz
X2
X1
XT2
P04
IC2
CPU
BUZ
BZ
IC6A
KID65003P
BZ1
VCC
+
IC2
CPU
/RESET
VDD
VCC
D24
1SS133
C18
22U/16V
+
+
C19
10U/50V
Q16
C3198
R59
1K
MODE SWITCH
/RESET
C11
M104
R58
1K
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