Read Sharp DV-720H (serv.man19) Service Manual online
25
DV-720S/DV-720S(K)
DV-720H
DV-720H
Pin No.
Pin name
Type
Direction
Function
31
HRD#—HDS#
I
I
Input
In host protocol type A (HTYPE=GNDP): HDS#. Data strobe input (active low).
In host protocol type B (HTYPE=VDDP): HRD#. Host read input (active low).
In host protocol type B (HTYPE=VDDP): HRD#. Host read input (active low).
33
HRDY
3-S
O (p.d.)
Reset: output (low)
Standby: 3-S
Standby: 3-S
Host ready output. When this signal is tri-stated (i.e., it requires a pull-up resistor), up to SysConfig.CodBurstLen
bytes of code can be written to the Decoder with no need to poll its condition in between. When HRDY is low during a
host access, the Decoder may still receive at least two additional bytes of code without corrupting the data.
bytes of code can be written to the Decoder with no need to poll its condition in between. When HRDY is low during a
host access, the Decoder may still receive at least two additional bytes of code without corrupting the data.
34
HIRQ#
3-S
O (p.u.)
3-S (p.u.)
Interrupt request. This output signal requests an interrupt from the host controller, if one of the events associated to
interrupts occurs, and it is not masked-off. It is de-asserted if the host responds to the interrupt by reading the
interrupt status register, or if the host disables the interrupt, or after RESET.
Deassertion of the HIRQ# output has two modes: De-activated and then tri-stated or directly to is a tri-state condition.
The pin needs external pull-up resistor.
interrupts occurs, and it is not masked-off. It is de-asserted if the host responds to the interrupt by reading the
interrupt status register, or if the host disables the interrupt, or after RESET.
Deassertion of the HIRQ# output has two modes: De-activated and then tri-stated or directly to is a tri-state condition.
The pin needs external pull-up resistor.
36
HACK#
3-S
O (p.u)
Reset: output (high)
Standby: 3-S (p.u.)
Standby: 3-S (p.u.)
Host acknowledge output. In protocol A, the Decoder indicates that a read or write cycle is completed by asserting
this output. In protocol B, this signal is used by the Decoder to indicate a wait state that may be used by fast hosts.
In protocol B the host may ignore the HACK# signal.
When this signal is deasserted it is de-activated and then tri-stated. This pin needs an external pull-up resistor.
this output. In protocol B, this signal is used by the Decoder to indicate a wait state that may be used by fast hosts.
In protocol B the host may ignore the HACK# signal.
When this signal is deasserted it is de-activated and then tri-stated. This pin needs an external pull-up resistor.
General Purpose I/O (Host Interface) (3 pins)
Pin No.
Pin name
Type
Direction
Function
147
GPAI/O
3-S
I/O (r.t.)
Reset: input
Standby: 3-S
Standby: 3-S
General purpose input/output pin, monitored/controlled by the audio processor software. After RESET, this pin is
defined as inputs. Their definition can be configured through ADP commands.
defined as inputs. Their definition can be configured through ADP commands.
172
GPSI
I
I
Input
General purpose input, monitored by the system de-multiplexer/video processor software.
171
DPSO
O
O (p.d.)
Reset: output (low)
Standby: 3-S
Standby: 3-S
General purpose output, controlled by the system de-multiplexer/video processor software. After RESET it outputs a
low level.
low level.
DVD-DSP Interface (13 pins)
Pin No.
Pin name
Type
Direction
Function
159
DVDREQ
O
O (p.d.)
Reset: output (low)
Standby: 3-S
Standby: 3-S
DVD-DSP data request output (programmable polarity).
157
DVDVALID
I
I
Input
DVD-DSP data valid input (programmable polarity).
156
DVDSOS
I
I
Input
DVD-DSP start of sector input (programmable polarity).
170
DVDDAT[7]
I
I
Input
169
DVDDAT[6]
168
DVDDAT[5]
167
DVDDAT[4]
166
DVDDAT[3]
164
DVDDAT[2]
162
DVDDAT[1]
161
DVDDAT[0]
DVD-DSP data input bus.
DVD-DSP data input bus.
158
DVDSTRB
I
I
Input
DVD-DSP data bit strobe (clock) input. Programmable polarity.
155
DVDERR
I
I
Input
DVD-DSP error indication input. Programmable polarity.
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