KX-NCP0158CE - Panasonic PBX Service Manual (repair manual). Page 9

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     KX-NCP0158CE
4.2.4.
Clock Circuit
4type of clock are used in this CS.
(1) 16.384MHz
This clock is used with IC100 (CPU) and IC500 (FPGA).
(2) 32.768kHz
This clock is used with RTC (Real Time Clock) of IC100.
(3) 50.0MHz
This clock is used with IC400 (PHY) and RMII i/f of IC300 (DSP)
(4) 10.368MHz
This clock is used with IC600 (BBIC). The frequency is calibrated by IC600.
4.2.5.
BUS Access Circuit
There are 3 types of Bus in this CS - High Speed Bus, Main Bus and Local Bus.
High Speed Bus and Main Bus are under the control of IC100 (CPU).
High Speed Bus is that which is used by CPU to access SDRAM (IC200, IC201) with high-speed processing. 
Main Bus is a result of branching off from a buffer (IC202 - IC205) of High Speed Bus, to which devices with low speed access
get connected.
Local Bus is controlled by MPU in BBIC.
Local Bus is controlled by MPU in BBIC.
DPRAM is a built-in function of IC500 (FPGA).
There are 2 CPUs in this CS, and each of them includes ROM and RAM.
* RAM in BBIC is SRAM (IC602), while RAM in CPU is SDRAM (IC200,IC201). 
*As two SDRAMs are required in IC300 (DSP), one SRAM and four SDRAMs are mounted on this CS.
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