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8.7. MAIN SCHEMATIC DIAGRAM
A
B
C
D
E
F
G
H
1
2
3
4
5
6
7
8
9
10
11
12
1.8V
3.2V
3.2V
3.1V
3.2V
3.2V
1.6V
1.6V
1.5V
0.7V
2.7V
0V
0V
0V
0V
3.2V
0V
0V
0V
2.6V
0V
0.3V
3.2V
0V
3.1V
3V
3.1V
2.4V
2.4V
2.3V
3.1V
1.5V
0V
3.1V
2V
1.6V
1.1V
1.3V
3.1V
3.1V
3.1V
3.1V
3V
3.1V
3.1V
3.1V
3.1V
3.1V
3.1V
0.4V
0V
0V
3.1V
3.1V
3.1V
3.1V
3.1V
3.1V
0.6V
0.4V
0V
3.1V
3.1V
2.5V
2.5V
2.3V
3V
3.1V
(1.4V)
1.4V
3.1V
0.6V
(3.1V)
1.3V (3.1V)
3.1V
3.1V
2V
2.9V
0V
(0.3V)
7.5V
(8.1V)
0V
0V
0V
(15.2V)
-
7.5V
-
7.8V
-
7.5V
(-
7.9V)
-
7.8V
(-
8.4V)
3.1V
3.1V
2.4V
3.1V
CN1
V4
V4
V3A
V3B
V3B
V2
V1A
V1B
V1B
GND
VOUT
VOUT2
VHH
VHH
VHH
GND
GND
GND
SUB
CSUB
VLL
VLL
VLL
RG
H1
H2
H2
20
19
18
17
16
15
14
13
12
11
10
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
IC1502
C0JBAA000102
C0JBAA000102
(CMOS2)
1
2
3
5
4
C1510
35V1
D1501
B0ACCK000005
R1506
100K
C1509
0.1
R1505
220K
C1508
2200P
2200P
C1527
0.1
C1528
0.1
1
2
3
4
C1504
0.1
C1502
2.2
C1503
16V22
16V22
C1505
0.1
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
37
38
39
40
41
42
43
44
45
46
47
48
25
26
27
28
29
30
31
32
33
34
35
36
Vss1
RST
DSGAT
ID
WEN
EBCKSM
V
DD
1
V
DD
2
RG
Vss2
Vss3
H1
H1
V
DD
3
V
DD
4
XSHP
XSHD
XRS
PBLK
CLPDM
Vss4
OBCLP
ADCLK
Vss5
CKO
CKI
OSCO
OSCI
V
DD
5
MCKO
SSI
SCK
SEN
VDI
HDI
Vss6
TEST1
VM
V2
V4
V1A
VH
V1B
V3A
VL
V3B
SUB
TEST2
C1507
0.1
R1501
2200
A1
A2
A3
A4
A5
A6
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A11
A12
R1502
2200
B6
B5
B4
B3
B1
C2
C3
C4
C5
C6
A12
R1524
22
A11
R1523
22
C1506
0.1
A10
R1522
22
B2
L1503
47 uH
L1502
47 uH
A8
A3 A9 A2 A6 A7 A5 A1 A4
IC1501
CXD2470R
CXD2470R
(TG)
R1521
10K
C1529
0.1
C1522
0.1
C1521
0.1
R1529
0
R1525
0
C1532
0.01
C1501
6.3V10
C1524
0.01
C1523
0.01
X1501
(36MHz)
C1017
0.1
C1016
0.1
C1015
0.1
C1014
0.1
C1013
0.1
C1012
0.1
C1010
0.1
C1009
0.1
C1008
0.1
R1011
0
R1008
0
R1009
10
REG +3.1V
PD1
GND
PD2
C1005
0.1
C1004
0.1
C1007
0.1
C1006
0.1
1 2 3 4 5 6 7 8 9 10 11 12
13
14
15
16
17
18
19
20
21
22
23
24
37
38
39
40
41
42
43
44
45
46
47
48
25
26
27
28
29
30
31
32
33
34
35
36
S
D
ATA
SCLK
SDEN
SV
DD
SVss
INT
OV
DD
OVss
D0
D1
D2
D3
D4
D5
D6
D7
D8
OVss
OV
DD
D9
D10
D11
NC
NC
V
ALID
PIX
SOF
ADC
CLK
OV
DD
OVss
SW
AP
OB
CLP
HS
B
VS
B
DLA
T
B
PLA
T
B
X
CLP
DV
DD
DVss
CCO IN2
CCO IN1
AVss
AV
DD
VREFP
VMID
VREFN
VREF
AV
DD
AVss
AFE D0
SD15
AFE D1
SD14
AFE D2
SD13
AFE D3
SD12
AFE D4
SD11
AFE D5
SD10
AFE D6
SD9
AFE D7
SD8
AFE D8
SD7
AFE D9
SD6
AFE D10
SD5
AFE D11
SD4
AFE SOF
SD2
AFE VPIX
SD3
ADC CLK
SD1
SI1
SC4
SO1
SV1
VSYNC
SC12
TG CS
SC6
SO1
SC3
SCK1
SC2
VSUB CTL
SC1
SCK1
SV2
CAP TRI
SC9
AFEIRQ
SC10
AFE CS
SC11
SCK0
SC7
SO0
SC8
SI0
SC5
R1004
22
R1002
22
R1001
22
R1504
2200
R1201
0
R1202
0
R1203
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
XACK
BCK
XTCK
HDOUT
VDOUT
Vss
V
DD
V
DD
ACTCHG
CAPTRI
Vss
CLK
SYSRST
SDO
SDI
XTST
XSM
C1203
0.1
R1204
0
C1202
0.1
C1201
6.3V10
L1201
B1
IC1201
JCY0182
JCY0182
(HD/ VD SSG)
C1
C5
C6
C5
C6
C4
C1
C7
C8
C9
C8
C9
C9
C8
R1016
0
C7
R1012
0
R1013
2200
41
40
REG -7.5V
REG -7.5V
42
REG +15V
43
REG +15V
REG+15V
PD3
C3
C2
CN2
L1002
10 uH
C1002
6.3V10
L1003
10 uH
C1003
6.3V10
L1001
10 uH
C1001
6.3V10
R1005
0
R1006
22
R1007
22
B4
B3
B2
B5
B7 B8
B7
B8
B6
IC1001
NC1250
NC1250
(AFE)
Q1501
2SC4617-QRTL
2SC4617-QRTL
L1501
10 uH
MAIN (SENSOR) SCEMATIC DIAGRAM
DMC-F7PP/E/B/A/EN MAIN(SENSOR) SCHEMATIC DIAGRAM
TO CCD FLEX
CIRCUIT
POSITIVE VOLTAGE LINE
NEGATIVE VOLTAGE LINE
VIDEO SIGNAL PATH
TO MAIN (PROCESS 1)
CIRCUIT (2-E,D)
CIRCUIT (2-E,D)
TO REGULATOR CIRCUIT
(CN102)
(CN102)
TO MAIN (PROCESS 1)
CIRCUIT (7-G)
CIRCUIT (7-G)
TO MAIN (SUB-u-COM)
CIRCUIT (2-H)
CIRCUIT (2-H)
TO MAIN (MAIN u-COM)
CIRCUIT (2-B)
CIRCUIT (2-B)
TO MAIN (PRCESS 1)
CIRCUIT (2-H)
CIRCUIT (2-H)
DMC-F7PP / DMC-F7E / DMC-F7E1 / DMC-F7B / DMC-F7B1 / DMC-F7A / DMC-F7EN
17
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