Read LG 47LEX8-ZA (CHASSIS:LD03S) Service Manual online
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
33
R1268
+1.2V_AVDD
GPIO_10
33
R1269
0
R1274
STDP_UART_RX
0
R1262
GPIO_5/BLU_ON/OFF
3.3K
R1281
STDP_SPI_DI
GPIO_24
+3.3V_DVDD
STDP_SPI_CS
DPRX_ML_L1N
STDP_UART_TX
1/16W
240 1%
R1261
33
R1278
0 . 1 u F
16V
16V
C1290
+3.3V_DVDD
0 . 1 u F
16V
C1295 OPT
0
R1263
GPIO_9
JTP-1127WEM
SW1200
1
2
4
3
4.7K
R1279
GPIO_1
GPIO_23
DPRX_ML_L0P
STDP_SPI_DO
STDP_SPI_CLK
AVDD_+3.3V
W25X20AVSNIG
IC1201
3
WP
2
DO
4
GND
1
CS
5
DIO
6
CLK
7
HOLD
8
VCC
STDP_SPI_DI
220
R1282
0
R1264
OPT
STDP_SPI_CLK
2.7K
R1260
GPIO_2/FRC_RESET
GPIO_3
33
R1267
+3.3V_DVDD
DPRX_ML_L1P
33
R1275
SML-210MT
LD1200
GPIO_0
GPIO_11
DPRX_ML_L0N
STDP_SPI_DO
GPIO_15
GPIO_4/LG5111_RESET
10K
R1280
GPIO_16
0 . 1 u F
C1294
STDP_SPI_CS
DPRX_AUX_N
DPRX_AUX_P
GPIO_7
GPIO_6
GPIO_8
I2C_SCL
I2C_SDA
0
R1284
0
R1285
I2C_SCL
I2C_SDA
27MHz
X1200
STDP4020AB
IC1000
DPRX_REXT
C10
DPRX_HPD_OUT/GPIO_26
D10
DPRX_AUXN
B9
DPRX_AUXP
C9
DPRX_ML_L0N
B8
DPRX_ML_L0P
A8
DPRX_ML_L1N
B7
DPRX_ML_L1P
A7
DPRX_ML_L2N
C6
DPRX_ML_L2P
B6
DPRX_ML_L3N
D5
DPRX_ML_L3P
C5
TCLK
A3
XTAL
A2
RESETn
E5
SPI_DI/GPIO_19
D13
SPI_DO/GPIO_20
E11
SPI_CLK/GPIO_18
E12
SPI_CSn/GPIO_17
F12
IR_IN/GPIO_12
G4
IRQ/GPIO_25
D12
VBUFC_RPLL
D4
TESTMODE0
F3
TESTMODE1
G3
AUX_I2C_SCL/GPIO_15
C13
AUX_I2C_SDA/GPIO_16
B14
I2C_SCL/GPIO_21
B13
I2C_SDA/GPIO_22
D11
I2C_MST_SCL/GPIO_2
G10
I2C_MST_SDA/GPIO_3
F11
UART_TX/BOOT[6]/GPIO_13
A1
UART_RX/GPIO_14
E4
AUX_UART_TX/BOOT[7]/GPIO_23
B12
AUX_UART_RX/GPIO_24
A12
I2S_0/BOOT[2]/GPIO_8
B1
I2S_1/BOOT[3]/GPIO_9
G5
I2S_2/BOOT[4]/GPIO_10
F4
I2S_3/BOOT[5]/GPIO_11
E3
I2S_BCLK/BOOT[1]/GPIO_7
C2
I2S_WCLK/BOOT[0]/GPIO_6
D3
I2S_MCLK/GPIO_4
D2
CLK_OUT/GPIO_5
C1
NC1
G11
NC2
G12
NC3
C11
NC4
A13
NC5
B4
GPIO_0
E6
GPIO_1
C3
12507WR-04L
P1201
1
2
3
4
5
+3.3V_DVDD
0 . 1 u F
50V
50V
C1278
STDP_UART_TX
STDP_UART_RX
33
R1283
0
R1277
0
R1276
22uF
10V
10V
OPT
C1299
22pF 50V
C1291
22pF 50V
C1292
ALEF M240Hz(TM480Hz) Sub Board
2 0 0 9 . 1 2 . 2 8
13
D P S i g n a l ( F l a s h m e m o r y )
12
[ D P R X F i r m w a r e B o o t s t r a p s ]
[ D P R X H a r d w a r e B o o t s t r a p s ]
[SPI FLASH(2Mbit)]
UART JIG FOR STDP DOWNLOAD
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