Read Sony KDE-V42A12U / KE-V42A10E Service Manual online
3.3 Main function of Each Assembly
3.3.1 X-Main board
The X-main board generates a drive signal by switching the FET in synchronization with Logic
Main board timing and supplies the X electrode of the panel with the drive signal through the
connector.
1) Maintain voltage waveforms (including ERC)
2) Generate X rising ramp signal
3) Maintain Ve bias between Scan intervals
3.3.2 Y-Bain board
The Y-main board generates a drive signal by switching the FET in synchronization with the
Logic Main board timing and sequentially supplies the Y electrode of the panel with the drive
signal through the scan driver IC on the Y-buffer board. This board connected to the panel’s Y
terminal has the following main functions.
1) Maintain voltage waveforms (including ERC)
2) Generate Y-rising Falling Ramp
3) Maintain V scan bias
3.3.3 Logic Main board
The logic main board generates and outputs the address drive output signal and the X ,Y drive
signal by processing the video signals. This Board buffers the address dirve output signal and
feeds it to the address drive IC (COF module)
(video signal- X Y drive signal generation , frame memory circuit / address data rearrangement)
3.3.4 Logic Buffer (E, F)
The logic buffer transmits data signal and control signal.
3.3.5 Y-Buffer board (Upper, Lower)
The Y-buffer board consisting of the upper and lower boards supplies theY-terminal with scan
waveforms. The board comprises 8 scan driver IC’s(ST microelectronics STV 7617 : 64 or 65
output pins) , but 4 ICs for the SD class
3.3.6 TCP (Tape Carrier Package )
The TCP applies Va pulse to the address electrode and constitutes address discharge by the
potential difference between the Va pulse and the pulse applied to the Y electrode. The TCP
comprise 4 data driver Ics (STV7610A : 96 pins output pins) 7 TCPs are required for signal scan
- 1 3 -
Click on the first or last page to see other KDE-V42A12U / KE-V42A10E service manuals if exist.