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DCR-IP45/IP45E/IP55/IP55E
COVER
COVER
4-39
4-40
VC-291 (1/20)
For Schematic Diagram
• Refer to page 4-101 for printed wiring board.
• Refer to page 4-107 for waveforms.
• Refer to page 4-101 for printed wiring board.
• Refer to page 4-107 for waveforms.
4-2. SCHEMATIC DIAGRAMS
VC-291 BOARD SIDE A
VC-291 BOARD SIDE B
4-2. SCHEMATIC DIAGRAMS
VC-291 BOARD SIDE A
VC-291 BOARD SIDE B
P0
R2.6
P0
R-0.4
R-7.2
P0
R-7.1
P0
R15.2
P0
R-0.3
P0
R-7.4
P0
R-7.6
P0
1.9
R2.8/P0
R1.6/P1.3
2.7
2.4
R1.4/P0
2.8
R*/P*
1.5
1.5
R*/P*
P0
R2.7
P0
R2.4
2.8
3.4
2.8
R2.1
P0
P0
R2.1
R1.6
P0
2.3
1.7
2.8
2.8
3.4
P0.2
R0.7
R0.5
P0
P0
R2.0
R0.8
P0
7
6
8
5
4
3
2
1
1.0
1.0
4.6
1.7
15.2
P0
R15.2
P13.6
R0
:Voltage measurement of the CSP IC
and the Transistors with mark,is
not possible.
and the Transistors with mark,is
not possible.
NO MARK:REC/PB MODE
R :REC MODE
P :PB MODE
* :Cannot be measured
R :REC MODE
P :PB MODE
* :Cannot be measured
0
R0.3/P0
R0.5/P0
R0.4/P0
R1.8/P0
R0.7/P0
R1.0/P0
R1.0/P0
R1.2/P0
R1.2/P0
R1.2/P0
R1.2/P0
2.7
1.5
2.7
2.7
R2.3/P0
2.7
2.7
2.7
2.7
2.7
2.7
2.7
2.7
R1.2
P0
P0
R1.1
2.7
2.7
0
2.7
2.7
Measurement at Mark is not possible
physically due to the parts mounted on
Side B.
When disk access fails,supply of power is
stopped due to power save.As the result,
most of the measurement points show"0"(zero).
physically due to the parts mounted on
Side B.
When disk access fails,supply of power is
stopped due to power save.As the result,
most of the measurement points show"0"(zero).
(DCR-IP45/IP55)
(DCR-IP45E/IP55E)
(DCR-IP45E/IP55E)
(DCR-IP45/IP55)
(DCR-IP45E/IP55E)
(DCR-IP45E/IP55E)
B
0.1u
C426
TG_FLD
R417
0
AD0_5
1SV329(TPL3)
D401
R407
0
1u
B
C417
10uH
L401
C418
TA
4V 22u
M
CH_SO
R412
0
0.1u
B
C428
CH_CS
CAM_3.4V
FB403
0uH
XX
C410
TG_ID
1u
B
C408
TA75S01F(TE85R)
IC404
1
2
3
45
0
R409
B
C404
0.001u
B
0.1u
C406
1u
B
B
C416
CAM_15V
0
R418
CLPOB
XX
C419
AD0_0
C402
2.2u
25V
A
AD0_7
CAM_DD_ON
IC403
XX
1
2
3
4
5
CAM_SCK
0.001u
B
C407
R404
0
B
0.1u
C403
A_4.6V
TG_HD
AD0_9
AD0_3
D_2.8V
220k
R415
ZV1
B
0.1u
C412
CAM_SO
CH_SCK
CAM_CS
0.1u
C423
VSG1
REG_GND
NDS356AP
Q401
0
R403
R402
0
TG_VD
FB402
0uH
AD0_4
AD0_6
XSYS_RST
C422
XX
XX
R410
A_2.8V
B
0.1u
C427
0
R408
0
R419
AD0_1
L402
10uH
470k
R401
UNRL21300AS0
Q402
IC402
AD80054JSTRL
D2
1
D3
2
D4
3
D5
4
D6
5
D7
6
D8
7
D9
8
D10
9
D11
10
D12
11
D13
12
DRVDD
13
DRVSS
14
DVSS
15
ADCLK
16
DVDD
17
DVDD
18
PBLK
19
CLPOB
20
XSHP
21
XSHD
22
CLPDM
23
AVDD
24
A
VSS
25
A
VSS
26
A
VDD
27
L1+
28
L2+
29
CCD_IN+
30
CCD_IN-
31
L-
32
A
VDD
33
LINE
34
A
VSS
35
CHROMA
36
SLM
37
VRT
38
VRB
39
SVDD
40
SVSS
41
SDL
42
RST
43
SDATA
44
SCLK
45
SEN
46
D0
47
D1
48
CAM_SI
FB404
0uH
22u
10V
C401
CHCK
1M
R416
AD0_2
FREQ_DV
AD0_13
XX
C409
FB405
0uH
AD0_12
AD0_8
CH
C405
*
CXD2477AR-T4
IC401
1
SSK
2
SSI
3
SEN
4
RST
5
VDD1
6
DSGA
T
7
TESTEN
8
A
VDD0
9
RG
10
VSS2
11
VSS3
12
H1
13
H2
14
AVDD1
15
AVDD2
16
XSHP
17
XSHD
18
XRS
19
VSS4
20
NC
21
PBLK
22
CLPDM
23
VDD2
24
XCHCK
25
CHCK
26
TEST
27
CK
28
VSS5
29
OSCO
30
OSCI
31
VDD3
32
ID
33
TGHD
34
TGVD
35
TGFLD
36
ZSG1
37
ZV1
38
CSUB
39
VM
40
V2
41
V4
42
V1
43
VH
44
V3
45
SHT
46
VL
47
SSO
48
VSS1
AD0_11
C424
XX
X401
*
AD0_10
FB401
0uH
30P
CN455
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
VREF1
VREF2
CAM_-7.5V
47k
R413
0.1u
B
C420
TA
M
6.3V
10u
C413
TA
M
6.3V
10u
C425
TA
C415
M
4V
22u
0.1u
B
C414
LIA2
LIA1
33k
R411
1
A
CSUB
AD0_0
AD0_1
AD0_2
AD0_3
AD0_4
AD0_5
AD0_6
AD0_7
AD0_8
AD0_9
CAM_CS
CAM_SO
CAM_SCK
XSYS_RST
CH_SO
CH_SCK
AD0_0
AD0_1
AD0_13
AD0_12
AD0_11
AD0_10
AD0_9
AD0_8
AD0_7
AD0_6
AD0_5
AD0_4
AD0_3
AD0_2
SHD
SHP
H2
H1
RG
CAM_DD_ON
XSYS_RST
CAM_CS
CAM_SO
CAM_SCK
CAM_SI
ZV1
VSUB
V3
V1
V4
V2
CAM_SI
XSYS_RST
CH_CS
CH_SCK
CH_SO
ZV1
VSG1
TG_FLD
TG_VD
TG_HD
TG_ID
VSG1
TG_FLD
TG_VD
TG_HD
TG_ID
AD0_10
AD0_11
AD0_12
AD0_13
CLPDM
CAM_DD_ON
CCD_OUT-
CCD_OUT+
CHCK
LIA2
SHD
SHP
CCD_OUT-
VSUB
CLPDM
V4
V3
V2
V1
H2
RG
H1
VREF1
VREF2
LIA1
CH_CS
CCD_OUT+
LIA1
VREF1
LIA2
VREF2
CSUB
CHCK
CLPOB
CLPOB
CSUB
G
vi
Vo
CE
IN-
OUT
VCC
IN+
VSS
NC
SHD
GND
VSUB
A_2.8V
GND
CAM_-7.5V
H1
RG
V1
CCD_OUT-
GND
V2
GND
GND
GND
GND
H2
VREF2
V4
LIA2
GND
CLPDM
LIA1
SHP
V3
CCD_OUT+
VREF1
GND
CAM_15V
CSUB
1
(18/20)
TO CD-399 BOARD CN3101
TIMING GENERATOR
IC401
ORIGIN OSC. CONTROL
IC404
AGC,A/D CONVERTER
IC402
Q401,402
15V SWITCH
15V SWITCH
2
(16/20)
3
(3/20,7/20,
20/20(CN451))
20/20(CN451))
(2/20,4/20,
16/20)
16/20)
4
5
(2/20,4/20,6/20,
8/20,9/20,14/20,
16/20,20/20(CN451))
8/20,9/20,14/20,
16/20,20/20(CN451))
6
(16/20)
7
(20/20)
8
(2/20)
(2/20,4/20,
16/20)
16/20)
9
VC-291 BOARD(1/20)
A/D CONVERTER,TIMING GENERATOR(CH BLOCK)
XX MARK:NO MOUNT
K
D
J
9
6
F
12
16
3
17
B
10
14
13
E
8
7
H
15
5
I
4
G
11
C
2
16
CHROMA
REC
Y
Y/CHROMA
VIDEO SIGNAL
SIGNAL PATH
PB
(PAGE 4-10 OF LEVEL2)
*C405
5P
10P
5P
10P
*X401
60MHz
54MHz
60MHz
54MHz
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