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DCR-IP210/IP210E/IP220/IP220E
COVER
COVER
4-49
4-50
VC-308 (7/21)
4-2. SCHEMATIC DIAGRAMS
VC-308 BOARD SIDE A
VC-308 BOARD SIDE B
4-2. SCHEMATIC DIAGRAMS
VC-308 BOARD SIDE A
VC-308 BOARD SIDE B
:Voltage measurement of
the CSP IC and
the Transistors with
mark,is not possible.
the CSP IC and
the Transistors with
mark,is not possible.
B
C751
4.7u
HADR[1]
DECFD
HADR[10]
D0_LK
0.01u
C758
BCIN[1]
0.01u
C755
0.01u
C762
BCIO[3]
CODECFD
BCIN[0]
BCIO[0]
BCK
BS[1]
HDAT[3]
BCIN[6]
BYIO[3]
HADR[3]
HADR[2]
VCER
INT_IC750
D1_LK
BYIN[5]
0.01u
C753
RD_LK
BCIO[1]
HADR[4]
IC750
CXD2890AGA-T6
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
44
52
43
51
42
50
41
49
40
48
39
47
38
46
37
45
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
DECHD
K_1.5V
BYIN[4]
BYIO[7]
BS[0]
BYIN[3]
HDAT[0]
BCIO[2]
HDAT[5]
FB751 0uH
HADR[7]
HDAT[1]
PLL27MCK
DSCK
BYIN[0]
F27MCK
D3_LK
IC750_XRDY
HADR[0]
BCIO[6]
HADR[5]
0.01u
C757
HADR[9]
BYIO[5]
BCIN[4]
D4_LK
HADR[6]
CODECVD
REG_GND
WE0_LK
FB750 0uH
WROX
BCIN[7]
XRST_RFML
D6_LK
R754
100k
HDAT[7]
CODECHD
D2_LK
HDAT[4]
BS[4]
BYIO[4]
B
C750
4.7u
BCIN[5]
BCIO[4]
HDAT[6]
0.01u
C756
RDX
D_2.8V
D7_LK
BYIN[1]
BCIO[5]
CS_IC750
BYIO[1]
BYIN[7]
BS[6]
HADR[8]
BYIN[2]
BYIO[0]
B
C752
4.7u
BSRDY
HDAT[2]
0.01u
C754
Q_1.5V
D5_LK
BCIN[2]
BS[5]
XCS_IC750
BYIO[6]
FB752 0uH
BYIO[2]
BYIN[6]
BSRE
BS[2]
BS[7]
BCIN[3]
R756
0
R758
0
R750
0
100k
R755
BCIO[7]
BS[3]
CL751
CL750
CL752
CL753
CL754
XRST_RFML
0.01u
C760
0.01u
C761
0.01u
C759
0.01u
C763
1
A
BS2IF2
IOVSS
LOS6
IOVSS
XRAS_TEST
Q_TEST15
IO13VDD
INVDD
IOVSS
VIDEO1IF13V4
IOVSS
HS1IF
SDCK_TEST
Q_TEST0
HADR6
VIDEO1IF13V11
IOVSS
IO30VDD
XRFSH_TEST
Q_TEST29
INVDD
D8M_OR_16M
IOVSS
BS2IF3
IOVSS
XCS_TEST
Q_TEST20
INVDD
VS1IF
D_TEST0
Q_TEST3
HADR9
VIDEO1IF13V14
IO30VDD
BSRDY2IF
Q_TEST31
LOG_OR_DRM
IO13VDD
IOVSS
BS2IF4
IOVSS
INVDD
BS1IF13V6
Q_TEST16
INVDD
VIDEO2IF6
FID1IF
Q_TEST1
IO30VDD
LOI
LOIRE
SCK
IO13VDD
IOVSS
BS1IF13V7
Q_TEST18
INVDD
IO30VDD
XWE_TEST
Q_TEST4
IO30VDD
HDAT6
VIDEO2IF5
LOSWE
HDAT2
HDAT5
VIDEO1IF13V5
TDIAG
BS2IF1
IO30VDD
XPRE_TEST
Q_TEST2
IO30VDD
IOVSS
BSRE1IF13V
HDAT15
VIDEO1IF13V12
VCER1IF13V
VIDEO2IF4
HDAT9
BS2IF0
IO30VDD
AX_TEST10
Q_TEST6
IO30VDD
BSRDY1IF13V
TMS
INVDD
HDAT13
IOVSS
IOVSS
IO30VDD
BCK1IF13V
PSIN
VIDEO2IF9
IO13VDD
AX_TEST7
Q_TEST5
IO30VDD
AX_TEST9
TDO
HDAT11
IOVSS
TSTE8M
IOVSS
IOVSS
Q_TEST7
IO13VDD
INVDD
PLLOUT
IO30VDD
IO13VDD
FID2IF
IOVSS
VIDEO2IF0
VIDEO2IF8
TWBI
HDAT10
IOVSS
TMSL2
IOVSS
HDAT8
IOVSS
VCER2IF
IO30VDD
IOVSS
CCKSEL
IO13VDD
TDI
IO30VDD
Q_TEST11
FRST
VIDEO2IF7
TPBI
HRD
IOVSS
IOVSS
XCS2IF
IOVSS
BS1IF13V2
TCK
IO30VDD
Q_TEST23
Q_TEST8
VCK1IF
VIDEO2IF10
HCK
HS2IF
AX_TEST8
IOVSS
Q_TEST_O_EN
IOVSS
LOS7
IOVSS
BS1IF13V5
IO13VDD
BS1IF13V0
Q_TEST19
Q_TEST9
XREP
HWR
AX_TEST5
IO13VDD
WAIT
IOVSS
BS2IF6
TESTLOG
IO30VDD
AX_TEST3
AX_TEST0
IO13VDD
IOVSS
BS1IF13V3
Q_TEST21
HDAT14
IO13VDD
Q_TEST14
BS2IF7
VIDEO1IF13V15
IO30VDD
AX_TEST6
AX_TEST4
IOVSS
IOVSS
TRESET
Q_TEST26
IRQ
ENCONL
Y
VCK2IF
Q_TEST10
QCK
IOVSS
VIDEO1IF13V13
IOVSS
BS1IF13V1
INVDD
D_TEST1
IOVSS
INVDD
TCLOCK
A
VDD
Q_TEST22
HDAT1
IOVSS
XRST
BSRE2IF
IO30VDD
CLKOUT
IOVSS
HADR2
AX_TEST1
IOVSS
BS1IF13V4
D_TEST3
IOVSS
Q_TEST24
IOVSS
IO13VDD
BCK2IF
INVDD
IO30VDD
VIDEO1IF13V3
IOVSS
IOVSS
VIDEO2IF3
A
VDD
HADR0
AX_TEST2
IOVSS
TMSL0
VIDEO1IF13V10
IOVSS
Q_TEST27
VIDEO1IF13V9
HDAT12
INVDD
IOVSS
VIDEO1IF13V2
HCS
TSTB
IOVSS
TMSL1
D_TEST2
VIDEO1IF13V8
VIDEO2IF2
IOVSS
XCAS_TEST
IO13VDD
INVDD
IO13VDD
VIDEO1IF13V7
LOST
VIDEO2IF11
INVDD
HADR4
IOVSS
TRST
HDAT7
IOVSS
D_TEST6
BAX_TEST
IO13VDD
INVDD
VIDEO2IF1
A
VDD
TEST_DRMID
IOVSS
LOS2
VIDEO2IF15
Q_TEST25
HADR3
LOS3
HDAT4
IOVSS
IOVSS
Q_TEST12
A
VDP
INVDD
D_TEST7
TSTE16M
VIDEO1IF13V0
IOVSS
A
VDD
VIDEO2IF12
Q_TEST28
HADR1
IOVSS
LOS0
HADR5
IOVSS
IO13VDD
LOS1
A
VSP
INVDD
IOVSS
INVDD
A
VDD
TPLL
D_TEST4
IOVSS
Q_TEST17
HDAT0
VIDEO1IF13V6
VIDEO2IF14
Q_TEST30
HADR7
IOVSS
HADR10
IO13VDD
LOS4
BS2IF5
INVDD
IOVSS
LOS5
IOVSS
CCK
INVDD
Q_TEST13
IO13VDD
HDAT3
D_TEST5
VIDEO1IF13V1
IOVSS
VIDEO2IF13
HADR8
IOVSS
INVDD
A
Y_TEST
PB
IC750
(5/21)
VC-308 BOARD(7/21)
MPEG VIDEO PROCESS(VIDEO-1 BLOCK)
Y
XX MARK:NO MOUNT
16
53
CHROMA
REC
MPEG VIDEO ENCODER/DECODER
SIGNAL PATH
VIDEO SIGNAL
Y/CHROMA
(4/21)
38
(4/21)
36
(5/21)
36
(9/21)
36
(8/21)
65
(3/21)
13
(3/21)
20
(16/21)
60
(8/21)
61
(9/21)
61
(10/21)
61
(16/21)
61
(8/21)
62
(9/21)
62
(16/21)
62
(14/21)
63
(20/21)
64
9
O
G
K
E
8
15
F
5
18
N
J
C
14
3
7
11
4
17
M
13
I
2
B
6
10
16
12
L
D
H
CSP(CHIP SIZE PACKAGE)IC
For Schematic Diagram
• Refer to page 4-103 for printed wiring board.
• Refer to page 4-103 for printed wiring board.
Click on the first or last page to see other DCR-IP210 / DCR-IP210E / DCR-IP220 / DCR-IP220E service manuals if exist.