Read Sony DCR-IP210 / DCR-IP210E / DCR-IP220 / DCR-IP220E Service Manual online
DCR-IP210/IP210E/IP220/IP220E
COVER
COVER
4-41
4-42
VC-308 (3/21)
4-2. SCHEMATIC DIAGRAMS
VC-308 BOARD SIDE A
VC-308 BOARD SIDE B
4-2. SCHEMATIC DIAGRAMS
VC-308 BOARD SIDE A
VC-308 BOARD SIDE B
:Voltage measurement of the CSP IC
and the Transistors with mark,is
not possible.
and the Transistors with mark,is
not possible.
1.4
1.4
2.8
NO MARK:REC/PB MODE
10k
R368
VFI_Y4
270
R340
2200p
C321
470
R347
CXD1451AGA-T6
IC301
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
1
40
141
142
143
144
44
52
43
51
42
50
41
49
40
48
39
47
38
46
37
45
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
OSDL
IFI_HD_R
ACC_CONT
BCIN[3]
EC3101C-PM-TL
Q310
IFI_Y5_R
R310
22
10k
R339
BCIO[6]
IFI_Y2_R
VFI_C0
F135MCK
BCIO[0]
BYIN[3]
CODECHD
VFI_Y6
BCIN[1]
BCIO[5]
R308
100k
10k
R336
DF3A8.2C(TPL3)
D303
BYIO[6]
0.1u
C320
R312
0
1.5V
DECHD
VFO_Y6
0.1u
C338
VFO_Y0
0
R335
BYIN[6]
COL_2
OSDR
470
R346
IFI_Y7_R
470
R342
VFI_Y2
IFI_OE_R
BYIO[4]
BYIO[7]
IFI_C2_R
OSDP
VFO_Y5
BYIN[7]
0.1u
C319
BCIO[1]
0
R301
0.1u
C326
R311
22
BYIO[0]
R309
22
R314
XX
L303
10uH
R348
0
BCIN[5]
VFI_Y1
A_2.8V
C314
0.1u
IFI_VD_R
470
R344
FB303
0uH
680
R366
4700
R337
BYIN[2]
COL_0
VFO_Y2
COL_1
VFO_Y7
DF3A8.2C(TPL3)
D302
TC7SHU04FU-TE85R
IC302
1
2
3
4
5
VFI_Y5
VFI_C2
BCIO[7]
T_FG_OFST
IFI_C0_R
BYIN[0]
R320
100k
100k
R319 XX
BYIO[3]
IFI_Y0_R
BCIN[0]
C301
4.7u
L301
10uH
0.1u
C325
0.1u
C318
BYIO[5]
L302
10uH
10uH
IFI_Y4_R
470
R345
VFO_Y1
R317
22
OSDHD
LINEOUT_V
0
R321
VFI_Y7
BYIN[5]
2SD2216L0AS0
Q309
470
R369
REG_GND
BCIN[6]
VFO_Y3
BCIO[3]
R323
XX
BYIN[1]
VFI_Y0
BCIN[7]
BYIO[1]
R315
0
BCIN[2]
IFI_C3_R
VFI_HD
IFI_Y6_R
1k
R325
IFI_Y1_R
2200p
C324
XX
C304
470
R343
10k
R338
BYIN[4]
IFI_C1_R
IFI_Y3_R
0
R313
0.1u
C311
0.1u
C310
0.01u
F
C323
VFI_C1
0.1u
C328
VFI_Y3
470
R341
R322
0
BCIO[4]
VFI_C3
0.1u
C317
10u
6.3V
C339
M
CODECVD
AGC_CONT
10k
R367
BCIN[4]
COL_3
VFO_Y4
R306
22
BYIO[2]
D_2.8V
BCIO[2]
CL324
1u
C303
1u
C340
10k
R370
FB302 0uH
6.3V
10u
C305
6.3V
10u
C306
PANEL_VD
RH_SI
MIC_SI
XCS_MIC
XCS_IC301
BSD_IN
SPCK
PLL27MCK
PCRPWM
BSD_OUT
F27MCK
RH_SO
RH_SCK
MIC_SI_EN
MIC_SCK
PANEL_HD
MIC_SO
ARECD
AUCKFS
AUCK256FS
SG_OUT
ADAO2
QRST
APBD
SLGATE
WEN
SSS
AUCK64FS
DECFD
DRUM_SWP
CODECFD
VFIO_C3
VFIO_C1
VFIO_C0
VFIO_C2
VFO_HD
VFO_OE
VFI_OE
VFI_VD
VFO_VD
C316
0.1u
C322
0.1u
DAY
DAC
V_BUFF_2.8V
DAPR
DAPG
DAPB
DAER
DAEG
DAEB
A_4.6V
PLL27MCK
CAM_SO
CAM_CS
CAM_SI
CAM_SCK
R318
0
0
R324
XSYS_RST
IC301_ADC
SYS_V
ADIN
LINEIN_V
DAOUT
IC301_ADY
AUCKFS
VFO_OE
LINEOUT_V
PLL27MCK
LINEOUT_V
LINEOUT_V
DECFD
CODECFD
F27MCK
1
A
ADAI2
OSDHD
BSD_IN
OSDP
APBD
PLL27MCK
XSYS_RST
RH_SI
OSDR
COL_3
CAM_CS
COL_3
DAOUT
VFI_OE
VFIO_C3
MIC_SCK
DECFD
LINEOUT_V
ADAO2
VFIO_C2
IC301_ADC
MIC_SI
VFO_VD
P
ANEL_HD
OSDL
RH_SCK
SLGA
TE
AUCKFS
LINEIN_V
CAM_SCK
ADAI2
LINEOUT_V
CAM_SO
ARECD
MIC_SO
COL_0
F27MCK
VFO_OE
COL_1
VFIO_C0
PCRPWM
OSDR
CODECFD
CAM_SI
P
ANEL_VD
COL_1
VFI_VD
MIC_SI_EN
F135MCK
OSDP
OSDHD
VFO_HD
DRUM_SWP
DAPB
SYS_V
QRST
COL_0
COL_2
ADIN
COL_2
XCS_MIC
OSDL
VFIO_C1
WEN
RH_SO
AUCK256FS
AUCK64FS
SSS
SG_OUT
XCS_IC301
F135MCK
BSD_OUT
SPCK
PANEL_VD
MIC_SI
XCS_IC301
XCS_MIC
BSD_IN
RH_SI
F27MCK
PLL27MCK
SPCK
PCRPWM
BSD_OUT
MIC_SCK
PANEL_HD
MIC_SO
RH_SO
MIC_SI_EN
RH_SCK
ADAO2
SSS
AUCK64FS
AUCKFS
SG_OUT
AUCK256FS
APBD
WEN
SLGATE
ARECD
QRST
DECFD
CODECFD
DRUM_SWP
VFIO_C2
VFIO_C3
VFIO_C1
VFIO_C0
VFO_VD
VFI_OE
VFI_VD
VFO_HD
DAER
DAEG
DAPG
DAEB
DAPG
DAPB
DAER
DAEG
DAEB
PLL27MCK
CAM_SO
CAM_SI
CAM_CS
CAM_SCK
XSYS_RST
IC301_ADC
ADIN
SYS_V
DAOUT
LINEIN_V
VFO_OE
VFO_OE
IC301_ADY
IC301_ADY
AUCKFS
VFO_OE
LINEOUT_V
PLL27MCK
LINEOUT_V
LINEOUT_V
F27MCK
DECFD
CODECFD
ADAI2
TGHDO_HD
A
VS_AL
Y
IREFY
YMI6
F27MCKIN
CEG(N.C.)
DECC7
IOVSSH
SCK
IOVDDO
VRBY
EVRDA4
A
VS_AL
Y
CAM_SI
AVD_DRAM2
CMO4
HI_SCK
TMS
CKSELO
EDY4
TCK
XSGRST
COL3
COL1
OPOUT1
DECC0
EDY6
N.C.
AVD_DAYO
AVD_DAEV
TEST
CMO0
TGCKIN
AVS_DRAM2
N.C.(ADR)
LINE_IN_V
SO
A
VD_AL
Y
CAM_CS
N.C.
A
VS_PLL5
IOAVS
YMI3
YMI2
DECC4
DVS
DAER
BCKIN
AVD_EVRDACE
CMI7
AVS_DRAM3
CS
VR
TY
SCAN
INVSS
AVS_DAPU
YMI1
YMO3
IREFPG
EDY1
AVD_DRAM3
DAPR
AD7_Y5
CMI5
N.C.(ADL)
DRAMTEST
YMO2
DAOUT
DSDL
AVD_DAEY
YMO1
CY(N.C.)
EVRDA1
AD2_Y0
OP2N
DECC6
INVSS
DECY2
CARN
SELOUT
N.C.
SSS
AVS_DAEY
A
VD_PLL5
OP1P
A
D
ATA
I
IOVSSH
YMI7
OP3P
AVD_DAPU
CMO6
AD8_Y6
DIR1B
EDY5
N.C.(VCOM)
DAY
DAEG
N.C.(DAL)
SLGA
TE
DECY7
IOVDDH
ACC
F256FSO
AUBCKO
OP3N
PWM1_DIR1A
A
VS_PLL1
IOVSSH
CMO7
PBLK_C4
CMI4
CMO3
HMI
CC(N.C.)
AVS_PLL3
TDO
BSOUT
SG_OUT
OPOUT4
EDY7
CKSEL1
AULRCKO
AVS_EVRDACE
OSDHD
ANALOGTEST
AD3_Y1
A
VD_PLL1
FLDMI
EDC2
YMO7
CMI6
ADC
IOVSSL
F135MCKIN
SWP
CLPVO
AVS_PN
MSUB
XSWE
AUVCOI1
EVRDA3
A
VD_AL
Y
IOVSS0
DECY4
CLP1_C5
YMI5
AVS_DAPY
EDFLD
PVD
AGC
AD9_Y7
AVS_DAPV
SINT
AVS_DACO
QRST
VCTL
YMO5
SENSE1
DVD
SENSE0
INVDD
OSCIN
DECY3
VGA
T_C1
XRST
OPOUT0
IOVDDL
AD4_Y2
DAPB
ID_FLD
INT_GEMINI
AVS_PLL4
PWM0_DIROA
DAEB
AVD_DAPV
OP1N
VRBC
DECFLD
AVD_ALC
IOVDDH
IOVSSH
AD6_Y4
EN1_EN1
INVDD
VRTC
TDI
OP2P
AVD_PN
SYSV
YMI4
OPOUT5
AVD_DRAM1
DVD2(N.C.)
EDY3
IOVDDH
EDY0
AD1_C7
AD5_Y3
OPOUT2
EDC6
AVD_PLL4
DECHD
NC(DAR)
A
VD_PLL2
A
VS_PLL2
OSDR
IRIS
DECY0
XSG1_C0
CMO5
DAPG
TGFLDO_C3
N.C.(ADREFR)
RESRVED
AVS_DAEU
CARP
CPG(N.C.)
YMI0
IREFC
FLDMO
OPOP
DECC5
HMO
BSIN
SHUTTER
CAM_SO
CMO2
N.C.
ADIN
OP0N
DECC1
HI_SO
OSDP
AVS_OP
DAC
ADO_C6
AVS_DRAM1
AVD_DAEU
DECC3
EDY2
SI
DECC2
CMI0
OSCOUT
CMI3
AVD_DAPY
A
VS_DA
Y0
EDC1
EVRDA2
COL0
VRB
HI_CS
FSCO
VMI
TGVDO_VD
PCRPLL
ADIN0
IOVSSH
CMI1
EDVD
DECVD
YMO6
AVD_OP
CMO1
DECY6
DVS2(N.C.)
AUPCO
IREFEG
APLLO
PCO
EDC4
VRT
PLL27MCKO
AVD_PLL3
EDC0
EDC3
EN0_EN0
COL2
XV1_C2
CMI2
EDHD
PHD
AVS_DAEV
YMO4
VCOI1
A
D
ATA
O
AVD_DACO
EDC5
APLLI
AVS_ALC
N.C.(ADREFL)
DECY5
EDC7
F27MCKO
IOVDDH
OPOUT3
DIR0B
TRST
YMO0
ADY
OSDVD
VMO
HI_SI
EXCKSEL
CAM_SCK
DECY1
IOA
V
D
F135MCKO
12
(20/21)
(7/21)
13
14
(4/21)
(4/21)
15
15
(13/21)
16
(4/21)
16
(5/21)
3
(1/21)
(2/21)
3
(15/21)
3
(2/21)
7
(18/21)
17
18
(8/21)
(8/21)
19
19
(16/21)
20
(7/21)
22
(13/21)
(16/21)
22
21
(12/21)
(4/21)
23
23
(12/21)
23
(16/21)
24
(5/21)
25
(17/21)
(4/21)
25
(10/21)
25
(16/21)
26
27
(14/21)
28
(4/21)
29
(9/21)
(10/21)
30
31
(20/21)
(15/21)
32
(17/21)
33
IC302
INVERTER
IC301
BASE BAND PROCESS
CSP(CHIP SIZE PACKAGE)IC
BASE BAND PROCESS(B BLOCK)
VC-308 BOARD(3/21)
XX MARK:NO MOUNT
2
G
K
5
E
M
17
19
13
3
F
4
J
L
16
C
18
9
P
12
D
15
I
B
8
O
11
14
21
H
7
6
N
10
20
CLAMP
CLAMP
16
SIGNAL PATH
AUDIO
Y
SIGNAL
CHROMA
VIDEO SIGNAL
Y/CHROMA
PB
REC
For Schematic Diagram
• Refer to page 4-103 for printed wiring board.
• Refer to page 4-103 for printed wiring board.
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