Read Sony DVP-NS9100ES Service Manual online
110
DVP-NS9100ES
Pin No.
Pin Name
I/O
Description
57, 58
TEST_MODE2,
TEST_MODE3
-
Terminal for the test mode Normally: fixed at "L"
59
RESET
I
Reset signal input from the system controller "L": reset
60
RESET_ARM
I
Reset signal input from the i.link system controller "L": reset
61
LINK_ON
O
LINK on/off control signal output terminal Not used
62
HPS
I
Host power supply status detection signal input terminal Not used
63
LOW_PWR_RDY
O
Power supply detection signal output terminal Not used
64
DISABLE_IF
I
Interface disable signal input terminal Not used
65, 66
GPIO0, GPIO1
I/O
Not used
67
SDA
I/O
Serial data input/output terminal Not used
68
SCL
I/O
Serial data transfer clock signal input/output terminal Not used
69 to 72
GPIO6 to GPIO9
I/O
Not used
73
REG_EN
I
Setting terminal for the internal regulator enable
74
REG_OUT
O
+1.8V power supply output terminal
75
VDD
-
Power supply terminal (+3.3V)
76
VSS
-
Ground terminal
77
TMS
I
Mode selection signal input terminal (for JTAG)
78
TDI
I
Data input terminal (for JTAG)
79
TDO
O
Data output terminal (for JTAG)
80
TCK
I
Clock signal input terminal (for JTAG)
81
TRST
I
Reset signal input terminal (for JTAG)
82
ARM_TMS
I
Mode selection signal input terminal (for ARM JTAG)
83
ARM_TDI
I
Data input terminal (for ARM JTAG)
84
ARM_TDO
O
Data output terminal (for ARM JTAG)
85
UART_TXD
O
UART transmit data output terminal when writing internal flash memory
86
UART_RXD
I
UART receive data input terminal when writing internal flash memory
87
GPIO10
I/O
Not used
88
TMR WTCHDOG
O
Watch dog timer output terminal Not used
89
MCIF_INT
O
Interrupt request signal output to the i.link system controller
90
MCIF_CS_IO
I
Chip select signal input from the i.link system controller
91
MCIF_CS_MEM
I
Chip select signal input from the i.link system controller
92
MCIF_R_NW
I
Write/read selection signal input terminal for interface
"L": write, "H": read Fixed at "H" this set
"L": write, "H": read Fixed at "H" this set
93
MCIF_STRB
I
Strobe signal input terminal for interface Not used
94
MCIF_WAIT
O
Bus wait request signal output to the i.link system controller
95
MCIF_ACK
I/O
Acknowledge signal input/output terminal for interface Not used
96
MCIF_OE
I
Data read enable signal input from the i.link system controller
97
MCIF_WE
I
Data write enable signal input from the i.link system controller
98
MCIF_BUSCLK
I
Bus clock signal input from the i.link system controller
99, 100
MCIF_DATA0,
MCIF_DATA1
I/O
Two-way data bus with the flash memory and i.link system controller
101
VDD
-
Power supply terminal (+3.3V)
102
VSS
-
Ground terminal
103 to 114
MCIF_DATA2 to
MCIF_DATA13
I/O
Two-way data bus with the flash memory and i.link system controller
115
REG_OUT
O
+1.8V power supply output terminal
116
VDD
-
Power supply terminal (+3.3V)
117
VSS
-
Ground terminal
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