Read Sony XVM-R90D Service Manual online
18
XVM-R90D
Pin No.
Pin Name
I/O
Description
49
XMP1_1
I/O
Not used
50
XHRSTJ
I
Reset signal for ATA bus input from the MPEG decoder
51
XGPIO1
O
DVD/CD switching signal output terminal
52
XGPIO0
I
Switch input from the gain switch
53
XCRSTJ
I
Chip reset signal input form the reset signal generator
54
XMPSENJ
O
Output enable signal output to the flash memory
55
VDD_3.3
—
Power supply terminal (+3.3V)
56
XMALE
I/O
This terminal for address latch signal Not used
57
XMP1_0
I
Switch input from the RF switch
58
VDD_3.3
—
Power supply terminal (+3.3V)
59
XOSC1
I
System clock input terminal (33.8688 MHz)
60
XOSC2
O
System clock output terminal (33.8688 MHz)
61
GND
—
Ground terminal
62 to 69 XMD0 to XMD7
I/O
Two-way data bus with the flash memory
70
XMCSJ
I/O
This terminal for chip select signal Not used
71
XMRDJ
I/O
This terminal for read strobe signal Not used
72
XMWRJ
O
Write strobe signal output to the flash memory
73
XMINT1J
I/O
This terminal for interrupt signal Not used
74
XMA11
O
Address signal output to the flash memory
75
XMA10
O
Address signal output to the flash memory
76
VDD_3.3
—
Power supply terminal (+3.3V)
77 to 86 XMA9 to XMA0
O
Address signal output to the flash memory
87
XMA12
O
Address signal output to the flash memory
88
GND
—
Ground terminal
89 to 91
XMA13 to
XMA15
O
Address signal output to the flash memory
92
XHDASPJ
I/O
This terminal for drive active/slave present signal Not used
93
XHCS3J
I
Chip select signal input from the MPEG decoder
94
XHCS1J
I
Chip select signal input from the MPEG decoder
95
XHA2
I
Host address signal input from the MPEG decoder
96
XHA0
I
Host address signal input from the MPEG decoder
97
XHPDIAGJ
I/O
This terminal for diagnostics signal Not used
98
XHA1
I
Host address signal input from the MPEG decoder
99
XHCS16J
O
Chip select signal for 16 bit data transfer output from the MPEG decoder
100
XHINTJ
O
Interrupt request signal output to the MPEG decoder
101
XHDACKJ
I
DMA acknowledge signal input terminal Not used
102
XHIORDYJ
O
Ready signal output to the MPEG decoder
103
XHIORJ
I
Data read enable signal input from the MPEG decoder
104
XHIOWJ
I
Write strobe signal input from the MPEG decoder
105
XHDRQJ
O
MPEG acknowledge signal or DMA request signal output terminal Not used
106
XHD15
I/O
Two-way host data bus with the MPEG decoder
107
XHD0
I/O
Two-way host data bus with the MPEG decoder
108
XHD14
I/O
Two-way host data bus with the MPEG decoder
109
XHD1
I/O
Two-way host data bus with the MPEG decoder
110
GND
—
Ground terminal
111
XHD13
I/O
Two-way host data bus with the MPEG decoder
112
XHD2
I/O
Two-way host data bus with the MPEG decoder
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