Read Sony XVM-B62 Service Manual online
27
XVM-B62
IC801 PVI1004D (DISPLAY CONTROLLER) (MAIN BOARD (2/2))
Pin No.
Pin Name
I/O
Pin Description
1
IVSYNC
—
Not used (Open)
2
IVIY
I
Vertical sync signal input
3
IFRST
I
Reset signal input
4
ICSY
I
Horizontal sync signal input
5
ICOMPS
I
Composite/separate sync mode select input (Fixed at “L”)
6
ICLKC
—
Not used (Open)
7
IOMCLK
—
Not used (Open)
8
OPSI
—
Not used (Open)
9
OPSC
—
Not used (Open)
10
OPOLS
O
Video polarity alternating signal output
11
OPOLC
—
Not used (Open)
12
OBLK
O
Blanking control signal output
13
ONPD
—
Not used (Open)
14
IOHSY
I/O
Horizontal sync signal input/output
15
IOVSY
—
Not used (Open)
16
HVDD
—
Power supply (+3.3V)
17
IMODE1
I
Display mode control signal input
18
IMODE2
I
Display mode control signal input
19
IMODE3
—
Not used (Open)
20
IVPOS1
—
Not used (Open)
21
IVPOS2
—
Not used (Open)
22
VSS
—
Ground
23
IHPOS1
—
Not used (Open)
24
IHPOS2
—
Not used (Open)
25
IAREA_SEL
—
Not used (Open)
26
IMODE
—
Not used (Open)
27
ICPO_SEL
—
Not used (Open)
28
ICPH_SEL
—
Not used (Open)
29
IDD_SEL
—
Not used (Open)
30
LVDD
—
Power supply (+3.3V)
31
IRES3
I
Resolution mode setting input (Fixed at “H”)
32
IRES2
I
Resolution mode setting input (Fixed at “H”)
33
IRES1
I
Resolution mode setting input (Fixed at “H”)
34
IZ_SEL
I
Falling edge select input (PAL mode only) (Fixed at “H”)
35
ITST1
—
Not used (Pull down)
36
OOE3
—
Not used (Open)
37
OOE2
—
Not used (Open)
38
OOE1
O
LCD driver output enable control signal output
39
VSS
—
Ground
40
OSTV2
O
LCD driver start pulse signal output
41
OSTV1
O
LCD driver start pulse signal output
42
OCPV
O
LCD driver shift clock output
43
HVDD
—
Power supply (+3.3V)
44
IOSCI
I
VCO clock oscillator input
45
OOSCO
O
VCO clock oscillator output
46
VSS
—
Ground
47
OPDA
O
PLL phase comparative signal output
48
OSRST
—
Not used (Open)
49
OCPH1
O
LCD driver shift clock output
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