TA-WR1 - Sony Audio Service Manual (repair manual). Page 15

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15
TA-WR1
• IC Pin Function Description
RX BOARD  IC7405  MB89537APFM-G-598-BNDE1 (AMP CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
NC
O
Not used
2
MOD2
I
Setting terminal for the CPU operation mode    Fixed at “L” in this set
3
VOLT
I
Battery voltage detection input terminal    Not used
4
TEMP
I
Battery thermal detection input terminal    Not used
5 to 10
NC
Not used
11
AVCC
Power supply terminal (+3.3V) (for A/D converter)
12
AVR
I
Reference voltage (+3.3V) input terminal (for A/D converter)
13
AVSS
Ground terminal (for A/D converter)
14
DTVAILD
I
Data valid flag input from the RF demodulator    “L”: invalid, “H”: valid
15
PROTECT
I
Over current detection signal input for speaker output terminal    “L”: over current
16
CSOD
I
Captor start delay signal input from the RF demodulator    “H” active
17, 18
NC
Not used
19
RST
I
Reset signal input terminal    “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
20, 21
MD0, MD1
I
CPU operation mode setting signal input terminal
22
X0
I
Main system clock input terminal (12.5 MHz)
23
X1
O
Main system clock output terminal (12.5 MHz)
24
VSS
Ground terminal
25
DAC_CLK
O
Serial data transfer clock signal output to the D/A converter
26
DAC_DATA
O
Serial data output to the D/A converter
27
DAC_LAT
O
Serial data latch pulse signal output to the D/A converter
28
XRST
O
Reset signal output to the RF demodulator and stream processor    “L”: reset
29
P23
I
Setting terminal for the CPU operation mode    Fixed at “L” in this set
30
PPG02
I
Setting terminal for the CPU operation mode    Fixed at “H” in this set
31
SPRY
O
Speakers on/off relay drive signal output    “H”: speakers on
32
STOP
I
Power failure detection input terminal    “L”: power on
33
VOLIC_DATA
O
Serial data output to the electrical volume
34
VOLIC_CLK
O
Serial data transfer clock signal output to the electrical volume
35
PWR_RY
O
Main power on/off relay drive signal output terminal    “H”: power on
36
LED_RED
O
LED drive signal output of the standby indicator    “H”: LED on
37
LED_DIAT
O
LED drive signal output of the DIAT signal receive state indicator    “H”: LED on (receive error)
38
LED_ON
O
LED drive signal output of the power on indicator    “H”: LED on
39
DIATOFF
O
Power on/off control signal output terminal for the DIAT circuit    “H”: active
40
P10
I
Setting terminal for the CPU operation mode    Fixed at “H” in this set
41
MUTE
O
Muting on/off control signal output terminal    “L”: muting on
42
FAN1
O
Fan motor drive control signal output terminal    “H”: active
43
FAN2
O
Fan motor drive speed control signal output terminal    “H”: high speed, “L”: low speed
44
FAN_CLK
I
Fan motor stop detection signal input terminal    “L”: fan motor stop
45
FANON
I
Output level detection signal input terminal    “H”: low level, “L”: high level
46
SCMODE
O
Control mode selection signal output terminal    “L”: pin setting, “H”: serial setting    Not used
47
PSAVE
O
Power on/off control signal output terminal for the volume control circuit    “H”: active
48
PWR_CTL
O
Not used
49
NC
Not used
50
PWMUTE
O
Not used
51
DIAT_CK
O
Serial interface data clock signal output to the RF demodulator
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