STR-DA3300ES, STR-DG1100 - Sony Audio Service Manual (repair manual). Page 123

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123
STR-DA3300ES/DG1100
DSP BOARD  IC2  ADSP21266SKSTZ-2C (DSP)
Pin No.
Pin Name
I/O
Description
1
VDDINT
-
Power supply terminal (+1.2V)
2, 3
CLKCFG0,
CLKCFG1
I
Clock frequency setting terminal
4, 5
BOOTCFG0,
BOOTCFG1
I
Boot mode setting terminal for DSP
6
GND
-
Ground terminal
7
VDDEXT
-
Power supply terminal (+3.3V)
8
GND
-
Ground terminal
9
VDDINT
-
Power supply terminal (+1.2V)
10
GND
-
Ground terminal
11
VDDINT
-
Power supply terminal (+1.2V)
12
GND
-
Ground terminal
13
VDDINT
-
Power supply terminal (+1.2V)
14
GND
-
Ground terminal
15
INT_REQ
O
Interrupt request signal output to the system controller
16
DIR_ERR
I
PLL lock error signal and data error flag input from the digital audio interface receiver
17
AD7
I/O
Two-way data bus with S-RAM and address signal output to the S-RAM
18
GND
-
Ground terminal
19
VDDINT
-
Power supply terminal (+1.2V)
20
GND
-
Ground terminal
21
VDDEXT
-
Power supply terminal (+3.3V)
22
GND
-
Ground terminal
23
VDDINT
-
Power supply terminal (+1.2V)
24 to 26
AD6 to AD4
I/O
Two-way data bus with S-RAM and address signal output to the S-RAM
27
VDDINT
-
Power supply terminal (+1.2V)
28
GND
-
Ground terminal
29, 30
AD3, AD2
I/O
Two-way data bus with S-RAM and address signal output to the S-RAM
31
VDDEXT
-
Power supply terminal (+3.3V)
32
GND
-
Ground terminal
33, 34
AD1, AD0
I/O
Two-way data bus with S-RAM and address signal output to the S-RAM
35
XWR
O
Data write enable signal output to the S-RAM
36, 37
VDDINT
-
Power supply terminal (+1.2V)
38
GND
-
Ground terminal
39
XRD
O
Data read enable signal output to the S-RAM
40
ALE
O
Address latch enable signal output terminal
41 to 43
AD15 to AD13
I/O
Two-way data bus with S-RAM and address signal output to the S-RAM
44
GND
-
Ground terminal
45
VDDEXT
-
Power supply terminal (+3.3V)
46
AD12
I/O
Two-way data bus with S-RAM and address signal output to the S-RAM
47
VDDINT
-
Power supply terminal (+1.2V)
48
GND
-
Ground terminal
49 to 52
AD11 to AD8
I/O
Two-way data bus with S-RAM and address signal output to the S-RAM
53
A16
O
Address signal output to the S-RAM
54
VDDINT
-
Power supply terminal (+1.2V)
55
GND
-
Ground terminal
56, 57
A17, A18
O
Address signal output to the S-RAM
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