SCD-XB940 - Sony Audio Service Manual (repair manual). Page 64

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2-6.
IC  PIN  FUNCTION  DESCRIPTION
• MAIN BOARD  IC605  MB91107PFV-G-BND (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1, 2
O
Address signal output to the expander (IC612) and ROM (IC632)
3
A19/P63
O
Address signal output to the expander (IC612)
4, 5
O
Address signal output terminal    Not used (open)
6, 7
O
Test signal output terminal for check (fixed at “H” in this set)
8
A24/P70
O
Address signal output terminal (fixed at “H” in this set)
9
AVCC
Power supply terminal (+3.3V) (for A/D converter)
10
AVRH
Reference voltage input (high) terminal (for A/D converter)
11
AVSS/AVRL
Ground terminal (for A/D converter) and Reference voltage input (low) terminal
12 to 15
AN0 to AN3
I
Analog input terminal (for A/D converter)
16
TRG0/PH0
O
Reset signal output to the expander (IC612)    “L”: reset
17
TRG1/PH1
O
SACD/CD mode signal output to the digital filter (IC301)
18
TRG2/PH2/CS6X
O
Serial data output to the digital filter (IC301)
19
TRG3/PH3/CS7X
O
Shift signal output to the digital filter (IC301)
20
OCPA0/PH4
O
Latch signal output to the digital filter (IC301)
21
OCPA1/PH5
O
Initial signal output to the digital filter (IC301)
22
OCPA2/PH6
O
Audio muting signal output terminal    “L”: muting
23
OCPA3/PH7
O
Filter control signal output terminal
24
VCC
Power supply terminal (+3.3V) (digital system)
25
INT0/PG0
I
External interrupt request signal input terminal    Not used (fixed at “H”)
26
INT1/PG1
I
Interrupt request 1 signal input from the expander (IC612)
27
INT2/PG2
I
External interrupt request signal input terminal    Not used (fixed at “H”)
28
INT3/PG3
I
Interrupt request 3 signal input from the expander (IC612)
29 to 32
I
External interrupt request signal input terminal    Not used (fixed at “H”)
33
SI0/RF0
I
Serial data input from the display controller (IC203) and EEPROM (IC600)
34
VSS
Ground terminal (digital system)
35
SO0/PF1
O
Serial data output to the display controller (IC203) and EEPROM (IC600)
36
SC0/PF2
O
Clock signal output to the display controller (IC203) and EEPROM (IC600)
37
SI1/PF3
I
Serial data input from the DSD decoder (IC617)
38
SO1/PF4
O
Serial data output to the DSD decoder (IC617)
39
SC1/PF5
O
Clock signal output to the DSD decoder (IC617)
40
SI2/PF6
I
Serial data input terminal for check
41
SO2/PF7
O
Serial data output terminal for check
42
SC2/PE0
O
Clock signal output terminal for check
43
DREQ0/PE1
I
External transfer request signal input terminal
44
DACK0/PE2
O
External transfer request acknowledge signal output terminal
45
EOP0/PE3
O
Not used (open)
46
DREQ1/PE4
I
External transfer request signal input terminal    Not used (fixed at “H”)
47
DACK1/PE5
O
External transfer request acknowledge signal output terminal    Not used (fixed at “H”)
48
EOP1/PE6
O
Not used (open)
49
DREQ2/PE7
I
External transfer request signal input terminal    Not used (open)
50
DACK2/PI0
O
External transfer request acknowledge signal output terminal    Not used (open)
51
EOP2/PI1/ATGX
O
Not used (open)
A17/P61, 
A18/P62
A20/P64, 
A21/P65
A22/P66, 
A23/P67
INT4/PG4 to 
INT7/PG7
Pin No.
Pin Name
I/O
Description
52
VSS
Ground terminal (digital system)
53
X1
O
System clock output terminal (12.5MHz)
54
X0
I
System clock input terminal (12.5MHz)
55
VCC
Power supply terminal (+3.3V) (digital system)
56
RAS0/PB0
O
Control signal output terminal     Not used (fixed at “H”)
57
CS0L/PB1
O
Interrupt request signal output to the display controller (IC203)
58
CS0H/PB2
O
Muting signal output to the DSD decoder (IC617)    “L”: muting
59
DW0X/PB3
O
Not used (open)
60
RAS1/PB4
O
Latch signal output to the DSD decoder (IC617)
61
CS1L/PB5
O
Not used (open)
62
CS1H/PB6
I
Ready signal input from the DSD decoder (IC617)    “L”: ready
63
DW1X/PB7
O
Write enable signal output terminal   “L”: active
64
C
Bypass capacitor terminal for internal capacitor
65
CS0X
O
Chip select signal output to the ROM (IC632)   “L”: active
66
CS1X/PA1
O
Chip select signal output to the expander (IC612) and S-RAM (IC632)   “L”: active
67, 68
O
Chip select signal output terminal   “L”: active (fixed at “H” in this set)
69
CS4X/PA4
O
Chip select signal output to the expander (IC612)   “L”: active
70
CS5X/PA5
O
Chip select signal output terminal   “L”: active (fixed at “H” in this set)
71
CLK/PA6
O
Clock signal output to the expander (IC612)
72
NMIX
I
Non maskable interrupt signal input terminal   “L”: active (fixed at “H” in this set)
73
HSTX
I
Hardware standby signal input terminal   “L”: active (fixed at “H” in this set)
74
RSTX
I
Reset signal input from the display controller (IC203)
75
VSS
Ground terminal (digital system)
76
MD0
I
Mode set signal input terminal (fixed at “H”)
77, 78
MD1, MD2
I
Mode set signal input terminal (fixed at “L”)
79
RDY/P80
I
Wait signal input from the expander (IC612)
80
BGRNTX/P81
O
External bus release acknowledge signal output terminal (fixed at “H” in this set)
81
BRQ/P82
I
External bus release request signal input terminal (fixed at “L” in this set)
82
RDX
O
Read strobe signal output to the expander (IC612)
83
WR0X
O
Write strobe 0 signal output to the expander (IC612)
84
WR1X/P85
O
Write strobe 1 signal output to the expander (IC612)
85 to 92
I/O
Two-way data bus with the S-RAM (IC609) and ROM (IC632)
93 to 100
D24 to D31
I/O
Two-way data bus with the servo digital signal processor (IC607), S-RAM (IC609), expander 
(IC612) , RF signal decoder (IC622), and ROM (IC632)
101
VSS
Ground terminal (digital system)
102
A00
O
Address signal output to the servo digital signal processor (IC607), expander (IC612) , and RF 
signal decoder (IC622)
103
A01
O
Address signal output to the servo digital signal processor (IC607), S-RAM (IC609), expander 
(IC612) , RF signal decoder (IC622), and ROM (IC632)
104 to 107
A02 to A05
O
Address signal output to the S-RAM (IC609), expander (IC612), RF signal decoder (IC622), and 
ROM (IC632)
108, 109
A06, A07
O
Address signal output to the S-RAM (IC609), RF signal decoder (IC622), and ROM (IC632)
110
VCC
Power supply terminal (+3.3V) (digital system)
111 to 118
A08 to A15
O
Address signal output to the S-RAM (IC609) and ROM (IC632)
119
VSS
Ground terminal (digital system)
120
A16/P60
O
Address signal output to the S-RAM (IC609) and ROM (IC632)
CS2X/PA2, 
CS3X/PA3
D16/P20 to 
D23/P27
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