Read Sony NW-HD3 Service Manual online
39
NW-HD3
Pin No.
Pin Name
I/O
Description
120
PD2/DPLS
O
Test terminal for debug Not used
121
PD3/DMNS
O
Test terminal for debug Not used
122
PD4/TXDPLS
O
Test terminal for debug Not used
123
PD5/TXDMNS
O
Test terminal for debug Not used
124
PD6/TXENL
O
Test terminal for debug Not used
125
PD7/SUSPEND
O
Test terminal for debug Not used
126
VBUS
I
Not used
127
VDIOUS
—
Power supply terminal (for USB transceiver) Not used
128
UDM
I/O
Not used
129
UDP
I/O
Not used
130
TRON
O
Not used
131
AVSDA
—
Ground terminal (for internal D/A converter)
132
VREFER
O
Reference voltage output terminal (R-ch)
133
AOUTR
O
Analog audio signal output to the headphone amplifier (R-ch)
134
AOUTL
O
Analog audio signal output to the headphone amplifier (L-ch)
135
VREFL
O
Reference voltage output terminal (L-ch)
136
AVDDA
—
Power supply terminal (+2.4V) (for internal D/A converter)
137
XTAL
O
Main system clock output terminal (22.5792 MHz)
138
EXTAL
I
Main system clock input terminal (22.5792 MHz)
139
AVDMO
—
Power supply terminal (+2.4V) (for main system clock oscillator)
140
AVSOSC
—
Ground terminal (for main and sub system clock oscillator)
141
TX
O
Sub system clock output terminal (16 MHz)
142
ETX
I
Sub system clock input terminal (16 MHz)
143
AVDUO
—
Power supply terminal (+2.4V) (for sub system clock oscillator)
144
AVSPLL
—
Ground terminal (for PLL)
145
AVDPLL
—
Power supply terminal (+3.3V) (for PLL analog system)
146
PQ0/PGMTR0
O
Sleep signal output to the power control
147
PQ1/PGMTR1
O
Starting factor clear signal output to the power control
148
PQ2/PGMTR2
I
Charge progress signal input from the charge control
149
PQ3/PGMTR3
I
Charge completion signal input from the charge control
150
PQ4
I
Power good signal input from the power switch
151
PQ5
O
Sleep signal output to the multi interface
152
PQ6
O
Reset signal output to the sub system controller
153
PQ7
O
Reset signal output to the multi interface
154
DVSS8
—
Ground terminal
155
VDIO7
—
Power supply terminal (+1.8V) (for I/O interface)
156
PR0
O
Battery voltage monitor on/off control signal output terminal
157 to 161
PR1 to PR5
—
Not used
162
PR6
O
Headphone/line selection signal output to the headphone amplifier
163
PR7
O
Muting on/off control signal output to the headphone amplifier
164
DVSS9
—
Ground terminal
165
VDIOMS
—
Power supply terminal (+3.3V) (for memory stick interface) Not used
166
MSDIO
I/O
Two-way data bus with the memory stick interface Not used
167
MSBS
O
Bus state signal output to the memory stick interface Not used
168
MSSCLK
O
Clock signal output to the memory stick interface Not used
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