Read Sony NW-E303 Service Manual online
14
NW-E303
SECTION 4
DIAGRAMS
Note on Schematic Diagram:
• All capacitors are in µF unless otherwise noted. (p: pF) 50 WV
• All capacitors are in µF unless otherwise noted. (p: pF) 50 WV
or less are not indicated except for electrolytics and tantalums.
• All resistors are in Ω and
1
/
4
W or less unless otherwise speci-
fied.
•
%
: indicates tolerance.
• C : panel designation.
•
: B+ Line.
• Voltages and waveforms are dc with respect to ground under
no-signal (detuned) conditions.
no mark : POWEN ON
no mark : POWEN ON
∗
: Impossible to measure
• Voltages are taken with a VOM (Input impedance 10 MΩ).
Voltage variations may be noted due to normal production tol-
erances.
erances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal production tol-
erances.
erances.
• Circled numbers refer to waveforms.
• Signal path.
E
: PLAY BACK
a
: DIGITAL OUT
k
: DIGITAL IN
F
: FM
Note on Printed Wiring Board
• X : parts extracted from the component side.
• Y : parts extracted from the conductor side.
•
• X : parts extracted from the component side.
• Y : parts extracted from the conductor side.
•
: Pattern from the side which enables seeing.
Caution:
Parts face side:
Parts face side:
Parts on the parts face side seen from
(Side A)
the parts face are indicated.
Pattern face side: Parts on the pattern face side seen from
(Side B)
(Side B)
the pattern face are indicated.
• These boards are multi-layer printed board.
However, the patterns of intermediate-layer have not been in-
cluded in the diagram.
cluded in the diagram.
• Lead Layouts
surface
CSP (Chip Size Package)
Lead layout of conventional IC
• Waveforms
– MAIN Board –
– MAIN Board –
1
IC400 <zcm (XTAL)
44.5 ns
1.4 Vp-p
500 mV/DIV, 20 ns/DIV
2
IC400
<zvz
(TX)
62.4
n
s
1 V/DIV, 40 ns/DIV
3.5 Vp-p
3
IC401 8 (OSCOUT)
30.5 µs
500 mV/DIV, 20
µ
s/DIV
1.2 Vp-p
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