Read Sony ICF-CD73W Service Manual online
ICF-CD73W
31
• IC Pin Function Description
LCD BOARD IC401 uPD789477GC-A61-8BT-A (SYSTEM CONTROLLER)
LCD BOARD IC401 uPD789477GC-A61-8BT-A (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1, 2
NC
-
Not used
3 to 5
VLC2 to VLC0
-
Terminal for doubler circuit capacitor connection to develop liquid crystal display drive volt-
age
age
6 to 9
COM0 to COM3
O
Common drive signal output to the liquid crystal display
10 to 27
SEG17 to SEG0
O
Segment drive signal output to the liquid crystal display
28 to 30
VERSION0 to
VERSION2
I
Setting input terminal for destination
31
POWER ON
O
Power on/off control signal output terminal for the power amplifi er
"L": standby mode, "H": power amplifi er on
"L": standby mode, "H": power amplifi er on
32
R ON
O
Power on/off control signal output for the tuner section "H": tuner power on
33 to 37
NC
I
Not used
38
AVDD
-
Power supply terminal (+3.3V) (analog system)
39
FSEQ
I
CD synchronizing signal detection signal input from the digital signal processor
40
NC
I
Not used
41
AC IN
I
Power detection signal input terminal when connected AC power adapter (A/D input)
42
VM
I
Middle voltage (+3V) detection input for battery check
43
VH
I
High voltage (+6V) detection signal input for AC or battery check
44 to 46
KEY2 to KEY0
I
Front and top panel key input terminal (A/D input)
47
AVSS
-
Ground terminal (for analog system)
48
NC
I
Not used
49
DC CHK
I
Power failure detection signal input terminal "L": power failure, "H": power on
50
WRQ
I
CD interruption signal input from the digital signal processor
51
KEY CHK
I
Key interruption detection signal input terminal
52
BUZZER
O
Beep sound signal output terminal
53
CD DATA IN
I
Serial data input from the digital signal processor
54
CD DATA
O
Serial data output to the digital signal processor
55
CD CLK
O
Serial data transfer clock signal output to the digital signal processor
56
CD CE
O
Chip enable signal output to the digital signal processor
57
DRF
I
CD focus on/off detection signal input from the digital signal processor
58
XRST
O
System reset signal output to the digital signal processor "L": reset
59
CD ON
O
Power on/off control signal output for the CD section "H": CD power on
60
NC
I
Not used
61
CD OPEN
I
CD lid open/close detect switch input terminal "L": CD lid is closed, "H": CD lid is opened
62
MUTE
O
Tuner muting on/off control signal output to the FM/AM PLL "L": muting on
63
COUNT
I
PLL serial count data input terminal from the FM/AM PLL
64
R CLK
O
PLL serial data transfer clock signal output to the FM/AM PLL
65
R DATA
O
PLL serial data output to the FM/AM PLL
66
R CE
O
PLL chip enable signal output to the FM/AM PLL
67, 68
NC
I
Not used
69
IC
-
Ground terminal
70
XT1
I
Sub system clock input terminal (32.768 kHz)
71
XT2
O
Sub system clock output terminal (32.768 kHz)
72
VDD0
-
Power supply terminal (+3.3V)
73
VSS0
-
Ground terminal
74
X1
I
Main system clock input terminal (4.19 MHz)
75
X2
O
Main system clock output terminal (4.19 MHz)
76
RESET
I
System reset signal input from the reset signal generator "L": reset
For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H"
For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H"
77
LOAD
O
Load control signal output terminal for battery reverse insert check
78
A MUTE
O
Audio muting on/off control signal output terminal "L": muting on
79
B MUTE
O
Muting signal on/off control signal output terminal "L": muting on (beep sound on)
80
BATT CHK M
O
Middle voltage (+3V) control signal output terminal for battery check
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