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ICD-UX60/UX70/UX80
ICD-UX60/UX70/UX80
11
11
SECTION 4
DIAGRAMS
4-1. BLOCK DIAGRAM – MAIN Section –
NAND FLASH MEMORY
IC7000
P14
M15
28
27
27
26
22
1
CN8001
(USB)
2
3
4
3
4
VBUS
D–
D+
GND
D–
D+
GND
E7
D7
D7
P8
•
R9
•
T9
•
P9
•
N9
•
M9
•
T10
•
R10
29
I
32
•
41
I
44
L12
K14
P2
K13
L5
M4
8
5
1
1
32
N8
M8
R8
7
19
9
T8
P7
T7
P7
T7
10
16
17
16
17
N7
M7
8
18
9
ADCDAT
1
5
2
9
SPEAKER AMP
IC1003
DQ0
I
DQ15
EXD0(DQ0)
I
EXD15(DQ15)
EXA1(A0)
I
EXA20(A19)
A0
I
A19
VOA
7
VOB
INA
INB
SD
BCK
MCLK
SCLK
ADCLRC
CSB
SDIN
LINPUT1
RINPUT1
RINPUT1
R/B
I/O0
I/O7
FD0
FD7
WP
CE1
CE2
CLE
CE2
CLE
ALE
RE
WE
XFBSY
DP
DM
SDO1(P15)
SDI1(P16)
LRCK(P12)
SCK1(P14)
MCLK(P13)
BCK
DIN
EXTINT4(P25)
N15
EXTINT5(P26)
B9
LOUT
C10
ROUT
T16
XFCE3(P07)
T1
RXD1(P28)
M13
NRD(NOE)
G5
NCS0
J2
NWRENWRL/NWE
F1
NRES
RD
CS0
NWRENWRL
CS0
NWRENWRL
B4 RP
F1 F
G1 G
A4 W
XFWP
XFCEO
XFCE1(P1F)
XCLE
XALE
XFRE
XFWE
XFCEO
XFCE1(P1F)
XCLE
XALE
XFRE
XFWE
LINPUT2
J1002
A/D CONVERTER
IC1001
SYSTEM CONTROL,
D/A CONVERTER
IC5001 (1/2)
MIC901
(L–CH)
MICBIAS
RINPUT2
30
31
31
25
J1001
J
MIC902
(R–CH)
RESET
IC5000
MUTE
Q1000
RESET
IC5002
CPU VDD+1V
RESET
CPU VDD+3.1V
SP901
(SPEAKER)
N
M14,L13,K12,J15,H16,
G15,F15,F14,M16,L16,
K16,J13,H12,G14,F16,
G12
P16,N3,P1,N1,K5,M2,
J5,K4,H2,F5,G2,E5,
E4,E1,E3,E2,E15,
K3,J4,G4
E2,H2,E3,H3,H4,
E4,H5,E5,F2,G2,
E4,H5,E5,F2,G2,
F3,G3,F4,G5,F5,
G6
E1,D1,C1,A1,B1,
D2,C2,A2,B5,A5,
C5,D5,B6,A6,C6,
D2,C2,A2,B5,A5,
C5,D5,B6,A6,C6,
D6,E6,B2,C3,D4
NOR FLASH MEMORY
IC6000
HP INSERT
MIC INSERT
POWER/DISPLAY
SECTION
A
VBUS
• Signal Path
: AUDIO (DIGITAL)
: AUDIO (ANALOG)
: USB
(Page 12)
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