Read Sony ICD-UX200 / ICD-UX200F / ICD-UX300 / ICD-UX300F / ICD-UX400F Service Manual online
ICD-UX200/UX200F/UX300/UX300F/UX400F
ICD-UX200/UX200F/UX300/UX300F/UX400F
15
15
F
C
16
L
I
J
K
B
3
10
5
A
7
1
12
6
14
13
D
4
2
E
15
17
18
8
9
11
G
H
1
MAIN
6
BOARD
(5/5)
7
MAIN
BOARD
(2/5)
MAIN
BOARD
(3/5)
8
MAIN
BOARD
(4/5)
9
BOARD
MAIN
(4/5)
(3/5)
3
BOARD
MAIN
(5/5)
4
BOARD
MAIN
(4/5)
1
BOARD
MAIN
(5/5)
2
BOARD
MAIN
MAIN
BOARD
(3/5)
5
10
1
0.7
1.5
1.5
0.7
1.5
1.5
0.7
1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
0.1
3.1
0
3
1
3.1
3.1
1
3.1
1
1
1
3.1
1
3.1
1
1
3.3
0
1.4
3.1
1.5
1.8
1.8
1.8
0.1
3
3.3
3.1
1
3.1
3.1
3.1
1
3.1
1
3.1
UX200F/UX300F
/UX400F
IC8000
IC8007
IC8002
IC8003
IC8001
MAIN BOARD (1/5)
BATT_CHARGE_LEVEL
VBUS
HP_INSERT
CPU_32K
DP
8p
C8011
LRCK
SDA
CPU_PLL2_2.8
DOUT
MIC_INSERT
CHARGE_MEASURE_ON
MUTE
BACKLIGHT
BATT_LEVEL
DGND
LCD_A0
10p
C8020
0.5%
150
R8013
AIRQ
CPU_VDD_1.0
12MHz
X8000
DX/LO
CHARGE_ON
SP_SHDN
SDO1
MARK
220nH
L8000
HOLD
LSK3541FS8T2L
Q8001
BCK
KEY_XPONOFF
CS2
KEY_AD0
220
C8024
4V
AUDIO_POWER_ON
SP/HP_SEL
0.5%
150
R8008
CPU_V
SCK0
DATA
PST8227UL
IC8002
1
VOUT
2
VIN
3
NC
4
VSS
KEY_AD1
CPU_POWER_ON
LSK3541FS8T2L
Q8002
SDO0
CPU_ROUT
8p
C8010
BATT_LEVEL_MEASURE
DM
SCK1
1p
C8019
SCL
LED_G
DPC
0.5%
680
R8010
CPU_LOUT
DAMP_SEL
LCD_RESET
KEY_WAKEUP
LED_R
JL8001
JL8002
JL8003
JL8004
JL8008
JL801
1
JL8013
JL8017
JL8019
JL8022
JL8025
JL8029
JL8030
JL8039
JL8040
JL8044
JL8045
JL8048
JL8049
JL8051
JL8052
JL8053
1M
R8014
1M
R8015
JL8032
JL8035
JL8037
22k
R8009
470k
R8026
JL8026
JL8024
1M
R8004
JL8056
JL8057
TH8001
0.1
C8023
100k
R8027
100k
R8028
470k
R8022
470
R8018
470
R8017
0.1
C8016
JL8034
JL8036
JL8038
JL8041
JL8043
JL8046
JL8047
JL8050
JL8033
JL8031
JL8028
JL8027
JL8023
JL8021
JL8018
JL8016
JL8014
JL8012
JL8009
0.1u
C8013
0.1
C8012
1M
R8012
0
R8011
0.1
C8006
0.1u
C8003
0.1
C8004
1
C8002
0.1
C8007
0.1
C8005
0.1u
C8000
XC6213B152GR
IC8001
1
VOUT
2
VSS
3 CE
4 VIN
UNREG_2.4
DGND
470k
R8020
10
R8019
100k
R8000
0.1u
C8001
47k
R8001
470k
R8002
470k
R8007
470k
R8003
0
R8016
SDI1
0.1
C8015
0.1
C8014
0.1u
C8021
0.1
C8018
0.1
C8017
0.1
C8022
0.1
C8008
JL8000
JL8059
JL8006
JL8010
JL8015
JL8020
JL8007
JL8005
0
R8031
470k
R8032
470k
R8033
470k
R8034
470k
R8035
470k
R8048
470k
R8051
470k
R8050
470k
R8049
470k
R8047
470k
R8045
470k
R8046
470k
R8044
470k
R8041
470k
R8043
470k
R8040
470k
R8042
0
R8052
470k
R8038
470k
R8039
470k
R8037
470k
R8036
JL8062
470k
R8005
0.5%
100k
R8029
470k
R8063
FM_POWER_ON
0
R8064
0
R8021
0
R8024
470k
R8065
470k
R8066
470k
R8067
470k
R8068
470k
R8069
470k
R8070
470k
R8071
470k
R8072
R8062
4700
R8030
4700
0
R8079
JL8058
JL8060
JL8061
DDC_2.4_ON
22k
R8081
RESET_IN
0
R8080
Z_DET
TP8054
100
R8073
100
R8074
100
R8075
100
R8076
100
R8077
100
R8078
0.01u
C8033
CPU_VDD_3.1
470k
R8084
1M
R8085
2SJ0674G0LS0
Q8004
VCC_3.3
RUF025N02TL
Q8005
4.7
R8086
1%
1/3W
PST8208UL
IC8003
1
VOUT
2
VIN
3
NC
4
VSS
PST8210UL
IC8007
1
VOUT
2
VIN
3
NC
4
VSS
LC823403A-08A5-16-E
IC8000
B2
TEST1
A1
TEST2
C2
TEST3
B1
TEST4
D2
TEST5
C1
TEST6
C3
TCK
D3
RT
C
K
D1
NTRST
E2
EXA16(A15)
D4
TDI
E3
EXA15(A14)
E1
EXA14(A13)
F2
TMS
E4
EXA13(A12)
E5
EXA12(A1
1)
F3
TDO
F1
NRES
G2
EXA1
1(A10)
F4
VDD1
F5
EXA10(A9)
G3
VSS
H2
EXA9(A8)
G1
VDD2
G4
EXA20(A19)
G5
NCS0
H3
EXA21(P2E)
H1
NCS1
J2
NWRENWRL/NWE
H4
NCS2(P20)
J1
NCS3(P10)
H5
NRESET
K2
NLBEXA0
K1
NHBNWRH
J3
PHI(P1
1)
J4
EXA19(A18)
M4
SDO1(P15)
L5
SDI1(P16)
R1
TXD1(P2A)
T1
RXD1(P2B)
T2
TCLKA(P17)
R3
TCLKB(P18)
T3
TIOCA0(P19)
R4
VDD1
R2
TIOCB0(P1A)
P3
TIOCA1(P1B)
P4
TIOCB1(P1C)
R5
TXDO(P1D)
T4
RXD0(P1E)
N4
PO0
P5
PO1
R6
PO2
T5
PO3
N5
PO4
M5
PO5
M6
XFCE2(P06)
T6
XFCE3(P07)
P6
VDD1
N6
VSS
R7
VDD2
M7
XFWE
N7
XFRE
T7
XALE
P7
XCLE
T8
XFCE1(P1F)
R8
XFCE0
M8
XFWP
N8
XFBSY
P8
FD0
R9
FD1
T9
FD2
P9
FD3
N9
FD4
M9
FD5
T10
FD6
R10
FD7
P10
VDD1
N10
VSS
M10
VDD2
N11
SDWP
T11
SDCD
R11
SDCMD
P11
SDCLK
M11
SDAT1
T12
SDAT2
N12
SDAT3
R12
SDAT4
P12
VDDRTC
P13
VSSRTC
R13
XOUT32K
T13
XIN32K
R14
VDET
T14
RTCINT
T15
BACKUPB
R15
EXTINT0(P21)
T16
EXTINT1(P22)
P15
EXTINT2(P23)
R16
EXTINT3(P24)
P14
EXTINT4(P25)
N15
EXTINT5(P26)
N13
EXTINT6(P27)
P16
EXA1(A0)
N14
NCE
M12
VSSF
N16
DOUT
M15
DIN
M13
NRD(N0E)
M14
EXDO(DQ0)
L12
BCK
M16
EXD8(DQ8)
L15
VDD1
L13
EXD1(DQ1)
L14
VSS
L16
EXD9(DQ9)
K15
VDD2
K12
EXD2(DQ2)
K13
LRCK(P12)
K16
EXD10(DQ10)
K14
MCLK(P13)
J15
EXD3(DQ3)
J12
SCL(P28)
J16
SDA(P29)
J13
EXD1
1(DQ1
1)
J14
TXD2(P2C)
H13
RXD2(P2D)
H15
VDDF
H16
EXD4(DQ4)
H12
EXD12(DQ12)
L3
SDI0
P2
SCK1(P14)
M2
EXA6(A5)
N3
EXA2(A1)
M1
SDO0
P1
EXA3(A2)
J5
EXA7(A6)
N2
VDD2
K4
EXA8(A7)
N1
EXA4(A3)
L1
SCK0
M3
VSS
L2
EXTFIQ(P2F)
K5
EXA5(A4)
K3
EXA18(A17)
L4
VDD1
H14
VDD1
G15
EXD5(DQ5)
G16
VSS
G14
EXD13(DQ13)
G13
VDD2
F15
EXD6(DQ6)
F16
EXD14(DQ14)
F14
EXD7(DQ7)
G12
EXD15(DQ15)
E16
VSSF
E15
EXA17(A16)
D16
AVDDPLL1
D15
AVSSPLL1
E14
VCNT1
F13
VDDXT
C16
VSSXT
C15
XIN1
D14
XOUT1
C14
VSS
B16
XIN2
B15
XOUT2
A13 VDD1
A12 AVDDPLL2
B11 AVSSPLL2
A11 VCNT2
B10 AVSSDAMP
C10 ROUT
D10 AVDDDAMP
A10 AVDDDAMP
A12 AVDDPLL2
B11 AVSSPLL2
A11 VCNT2
B10 AVSSDAMP
C10 ROUT
D10 AVDDDAMP
A10 AVDDDAMP
B9 LOUT
C9 AVSSDAMP
D9 AVDDPHI1
E9 AVSSPHY1
B8 AVSSPHY2
A9 RREF
C8 AVSSPHY2
D8 AVDDPHY2
B7 AVDDPHY2
A8 AVSSPHY2
C7 AVSSPHY2
A7 AVSSPHY2
E8 AVDDPHY2
D7 DP
E7 DM
A6 AVSSPHY2
B6 AVDDPHY2
C6 AVDDADC
D6 AN0
A5 AN1
E6 AN2
B5 AN3
C5 AN4
A4 AN5
D5 AN6
B4 AN7
C4 AN8
A3 AN9
B3 AVSSADC
A2
C9 AVSSDAMP
D9 AVDDPHI1
E9 AVSSPHY1
B8 AVSSPHY2
A9 RREF
C8 AVSSPHY2
D8 AVDDPHY2
B7 AVDDPHY2
A8 AVSSPHY2
C7 AVSSPHY2
A7 AVSSPHY2
E8 AVDDPHY2
D7 DP
E7 DM
A6 AVSSPHY2
B6 AVDDPHY2
C6 AVDDADC
D6 AN0
A5 AN1
E6 AN2
B5 AN3
C5 AN4
A4 AN5
D5 AN6
B4 AN7
C4 AN8
A3 AN9
B3 AVSSADC
A2
A14
A15
A16
B12
B13
B14
C11
C12
C13
D11
D12
D13
E10
E11
E12
E13
F12
A16
B12
B13
B14
C11
C12
C13
D11
D12
D13
E10
E11
E12
E13
F12
TCK
RTCK
TDI
TMS
TDO
TRST
TCK
RT
C
K
TDI
TMS
TDO
TRST
SDATA[4]
SDATA[3]
SDATA[2]
SDATA[1]
SDATA[3]
SDATA[2]
SDATA[1]
SDCLK
SDCMD
SP/HP_SEL
MUTE
MUTE
DX/LO
DAMP_SEL
DAMP_SEL
HP_INSER
T
MIC_INSER
T
DX/LO
SP/HP_SEL
LRCK
DOUT
SP_SHDN
SDO1
SCK1
DA
TA
SP_SHDN
SDI1
DATA
DOUT
DOUT
SDO1
SCK1
SCK1
SDI1
SCK0
SDO0
LCD_RESET
LED_R
LED_R
LCD_RESET
LED_G
LED_R
LED_R
CPU_32K
CPU_32K
KEY_W
AKEUP
BACKLIGHT
SDO0
SCK0
SCK0
DDC_2.4_ON
KEY_XPONOFF
CHARGE_MEASURE_ON
AUDIO_POWER_ON
Z_DET
CHARGE_ON
FM_POWER_ON
BATT_LEVEL_MEASURE
CPU_V
CHARGE_MEASURE_ON
CHARGE_ON
FM_POWER_ON
CHARGE_ON
FM_POWER_ON
BATT_LEVEL_MEASURE
CPU_V
CPU_V
KEY_XPONOFF
AUDIO_POWER_ON
CPU_POWER_ON
Z_DET
CPU_POWER_ON
Z_DET
DDC_2.4_ON
RES
CPU_POWER_ON
LED_G
KEY_WAKEUP
BACKLIGHT
MIC_INSERT
HP_INSERT
LRCK
T15:
T14:
R14:
T13:
T14:
R14:
T13:
SDATA[4-1],
SDCLK,SCCMD
SDCLK,SCCMD
(CHIP SIDE PACKAGE)
SYSTEM CONTROL,D/A CONVERTER
RESET
SWITCH
S
1.5V REG.
S
VBUS DETECT
Q8001
Q8004,8005
RESET SWITCH
S
S
RESET
RESET
CSP
3-5. SCHEMATIC DIAGRAM – MAIN Section (1/5) –
(Page 18)
(Page 19)
(Page 19)
(Page 16)
(Page 17)
(Page 18)
(Page 17)
(Page 19)
(Page 17)
(Page 18)
When IC8000 on the Main board are damaged, exchange the new
Main board for the Main board which IC damaged.
Main board for the Main board which IC damaged.
• See page 10 for Waveforms. • See page 27 for IC Pin Function Description of IC8000.
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