Read Sony ICD-MS1 Service Manual online
– 40 –
Pin No.
Pin Name
I/O
Description
52
A10
O
Address signal output to the static RAM (IC727)
53
VCC
—
Power supply terminal (+3.3V)
54 to 59
A9 to A4
O
Address signal output to the static RAM (IC727)
60
VCC
—
Power supply terminal (+3.3V)
61
VSS
—
Ground terminal
62 to 64
A3 to A1
O
Address signal output to the static RAM (IC727)
65
PC0
I
Not used (open)
66
VCC
—
Power supply terminal (+3.3V)
67
VSS
—
Ground terminal
68
RXD2
I
Serial reception data input from the real time clock (IC721) and EEPROM (IC723)
69
TXD2
O
Serial transmission data output to the ADPCM (IC164), real time clock (IC721) and EEPROM
(IC723)
(IC723)
70
SCK2
O
Serial data transfer clock signal output to the ADPCM (IC164), real time clock (IC721) and
EEPROM (IC723)
EEPROM (IC723)
71
XDDEN
O
DSP control interface enable signal output to the ADPCM (IC164) “L” active
72
XDPDN
O
Power down control signal output to the ADPCM (IC164) “L”: power down
73
SP/LP
O
Filter switching signal output terminal “L”: SP mode, “H”: LP mode Not used
74
BTLSE
O
BTL/SE switching signal output terminal “L”: SE mode, “H”: BTL mode
75
VSS
—
Ground terminal
76
XLCDRST
O
Reset signal output to the liquid crystal display module (LCD720) “L”: reset
77
XBCK
O
DSP bit clock signal output to the ADPCM (IC164)
78
LCDSCK
O
Serial data transfer clock signal output to the liquid crystal display module (LCD720)
79
VCC
—
Power supply terminal (+3.3V)
80
BATTCTL
I
Not used
81
FWECTL
O
FWE control signal output terminal “L” active Connected to the FWE (pin <zz. ) in this set
82
VSS
—
Ground terminal
83
VCC
—
Power supply terminal (+3.3V)
84
LMUTE
O
Line muting control signal output terminal “H”: line muting on
85
HPMUTE
O
Muting control signal output to the earphone “H”: muting on
86
VSS
—
Ground terminal
87
EPRST
O
Reset signal output to the EEPROM (IC723) “L”: reset
88
BEEPCTL
O
Beep sound control signal output terminal “L”: beep sound on
89 to 92
D15 to D12
I/O
Two-way data bus with the static RAM (IC727)
93
VCC
—
Power supply terminal (+3.3V)
94
D11
I/O
Two-way data bus with the static RAM (IC727)
95
VSS
—
Ground terminal
96 to 102
D10 to D4
I/O
Two-way data bus with the static RAM (IC727)
103
VSS
—
Ground terminal
104
VCC
—
Power supply terminal (+3.3V)
105 to 108
D3 to D0
I/O
Two-way data bus with the static RAM (IC727)
109
VSS
—
Ground terminal
110
MODE0
I
Setting terminal for the CPU operational mode (fixed at “H” in this set)
111
MODE1
I
Setting terminal for the CPU operational mode (fixed at “L” in this set)
112
VCC
—
Power supply terminal (+3.3V)
113
EXTAL
I
Main system clock input terminal (3.7706 MHz)
114
VSS
—
Ground terminal
115
XTAL
O
Main system clock output terminal (3.7706 MHz)
Click on the first or last page to see other ICD-MS1 service manuals if exist.