Read Sony ICD-80 Service Manual online
– 17 –
Pin No.
Pin Name
I/O
Function
43
VSS
—
Ground terminal
44
POS DAT
O
Serial data output to the 1296 divider (IC106)
45
POS CLK
O
Serial data transfer clock signal output to the 1296 divider (IC106)
46
POS LE
O
Serial data latch pulse output to the 1296 divider (IC106)
47
PI CHK0
I
Not used (fixed at “L”)
48
PI TEST
I
Setting terminal for the test mode “L”: test mode
49
PI TCLK
I
Not used (open)
50
PI C/D
I
Command/data judging signal input from the equipment connected to digital I/O connector (CN703)
51
PO PAMP
O
Standby on/off control signal output to the power amplifier (IC105) “L”: standby
52
PO LCDR
O
LCD drive reference voltage control signal output to the LCD module
53
PO BEEP
O
Beep sound drive signal output terminal
54
VDD
—
Power supply terminal (+3.4V)
55
PO CHK1
O
Not used (open)
56
PO BOP
O
Battery lid open/close detection control signal output terminal
“L”: detection disabled, “H”: detection enabled
“L”: detection disabled, “H”: detection enabled
57
PO SPC
O
Master clock switching signal output in recording mode (LP/SP) (SP mode: 10.368 MHz)
In SP mode, “H” is output to the clock switch (IC703) to switch over the clock
In SP mode, “H” is output to the clock switch (IC703) to switch over the clock
58
PO LPC
O
Master clock switching signal output in recording mode (LP/SP) (LP mode: 6.912 MHz)
In LP mode, “L” is output to the clock generator (IC704) to switch over the clock
In LP mode, “L” is output to the clock generator (IC704) to switch over the clock
59
PO KEYV
O
Key power control signal output terminal
60
PO LCDV
O
LCD drive power control signal output to the LCD module
61
VSS
—
Ground terminal
62
BATT A/D
I
Dry battery voltage detection signal input terminal (A/D input)
63
KEY A/D
I
Key input terminal (A/D input) S703, 705 (STOP, REC), switch unit (FILE, PRIORITY, MENU)
keys input
keys input
64
—
O
Not used (open)
65
PO XSDW
O
Clear control signal output to the data latch (IC107)
66
VDD (VPP)
—
Power supply terminal (+3.4V)
67
POA CLK
O
Serial clock signal output to the MSM7560LGS (IC101) (Clock signal is output during serial data
transfer)
transfer)
68
PIA IS
I
Recording serial data input from the MSM7560LGS (IC101)
69
POA IR
O
Playback serial data output to the MSM7560LGS (IC101)
70
POD SCK
O
Serial data transfer clock signal output to the LCD module
71
POD STB
O
Strobe signal output to the LCD module
72
POD DAT
O
Serial data output to the LCD module
73
PULL UP
I
Not used (fixed at “H”)
74
PULL UP
I
Not used (fixed at “H”)
75
NMI
I
Non-maskable interrupt input terminal
76
XSYNC
I
Input of signal detecting that serial transfer to the MSM7560LGS (IC101) started
77
PI REQ
I
Communication request signal input from the equipment connected to digital I/O connector (CN703)
78
PI WAKE
I
Key interruption processing start signal input terminal
79
PI OPEN
I
Battery lid open/close detection switch (S701) input terminal “L”: battery lid is closed
80
PI POTA
I
Rotary encoder dial pulse input of the jog dial (
= – + +)
81
PI POTB
I
Rotary encoder dial pulse input of the jog dial (
= – + +)
82
RST
I
System reset signal input from the reset signal generator (IC502) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
83
VDD
—
Power supply terminal (+3.4V)
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