HT-SL50, HT-SL55, HT-SL70, STR-KSL50 - Sony Audio Service Manual (repair manual). Page 19

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19
STR-KSL50
3-11.  IC Pin Function Descriptions
• IC1201   CXD9617R (AUDIO DSP) (DIGITAL BOARD)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23 to 25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
I/O
I
I
I
I
O
I
O
I/O
I/O
I
O
O
I/O
O
O
O
I
I
I
O
I
I
O
I
O
O
O
O
O
O
O
I
I
O
O
Pin Name
VSS
XRST
EXTIN
FS2
VDD1
FS1
PLOCK
VSS
MCLK1
VDDI
VSS
MCLK2
MS
SCKOUT
LRCKI1
VDDE
BCKI1
SDI1
LRCKO
BCKO
VSS
KFSIO
SDO1 to SDO3
SDO4
SPDIF
LRCKI2
BCKI2
SDI2
VSS
HACN
HDIN
HCLK
HDOUT
HCS
SDCLK
CLKEN
RAS
VDDI
VSS
CAS
DQM/OE0
CS0
WE0
VDDE
WMD1
VSS
WMD0
PAGE2
VSS
PAGE1
Description
Ground terminal
Rest input from the system control
Not used (connected to the ground)
Not used (connected to the ground)
Power supply terminal (+2.5V)
Not used (connected to the ground)
Internal PLL lock signal output Not used (open)
Ground terminal
Resonator terminal (13.5MHz)
Power supply terminal (+2.5V)
Ground terminal
Resonator terminal (13.5MHz)
Master/slave operation selection terminal (L : internal clock) (fixed at “L”)
Internal system clock output to the CODEC (IC1501)
Not used (open)
Power supply terminal (+3.3V)
Bit clock input-output terminal for audio interface serial data Not used (open)
Data input from the CODEC (IC1501)
Sampling clock output to the CODEC (IC1501)
Bit clock output to the CODEC (IC1501)
Ground terminal
Audio clock (384fs/256fs) input from the DIR (IC1101)
Serial data output to the CODEC (IC1501)
Serial data output terminal Not used (open)
SPDIF power output terminal Not used (open)
Sampling clock input to the DIR (IC1101)
Bit clock input from the DIR (IC1101)
Data input from the DIR (IC1101)
Ground terminal
Acknowledge signal output to the system control (IC1601)
Serial data input from the system control (IC1601)
Clock input from the system control (IC1601)
Serial data output to the system control (IC1601)
Chip select signal input from the system control (IC1601)
SDRAM clock Not used (open)
SDRAM clock enable Not used (open)
Row address strobing Not used (open)
Power supply terminal (+2.5V)
Ground terminal
Column address strobing Not used (open)
Data I/O mask Not used (open)
Chip select signal output to the SRAM (IC1202)
Write enable signal output to the SRAM (IC1202)
Power supply terminal (+3.3V)
Setting WAIT mode for external memory (pull up)
Ground terminal
Setting WAIT mode for external memory (pull up)
External memory page switch signal output Not used (open)
Ground terminal
External memory page switch signal output Not used (open)
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