Read Sony HS-KP1 Service Manual online
HS-KP1
38
KP LCD BOARD (3/4) IC3604 YGV629-VZ (ON-SCREEN DISPLAY)
Pin No.
Pin Name
I/O
Description
1
PLLVDD
—
Power supply pin (+3.3 V)
2
FILTER
I
Filter connect pin for internal PLL
3
PLLVSS
—
Ground
4
NO USE
O
Not used. (Open)
5
PLLCTL5
I
PLL setting pin (Fixed at H)
6
PLLCTL4
I
PLL setting pin (Fixed at L)
7
PLLCTL3
I
PLL setting pin (Fixed at L)
8
PLLCTL2
I
PLL setting pin (Fixed at H)
9
PLLCTL1
I
PLL setting pin (Fixed at H)
10
PLLCTL0
I
PLL setting pin (Fixed at L)
11
DTCKS_N
I
Clock signal input (Fixed at H)
12
DTCK_IN
I
Clock signal input (Fixed at H)
13
VSS
—
Ground
14
VDD
—
Power supply pin (+3.3 V)
15 to 22
D0 to D7
I/O
Two-way data bus 0 to 7 input/output with the system control and S-RAM
23
WAIT_N
O
Wait signal output for the system control
24
READY_N
O
Ready signal output for the system control
25
INT_N
O
Interrupt signal output for the system control
26
VDD
—
Power supply pin (+3.3 V)
27
VSS
—
Ground
28
CS_N
I
Chip select signal input from the system control
29
WR_N
I
Write enable signal input from the system control
30
RD_N
I
Read enable signal input from the system control
31 to 33
PS2 to PS0
I
Address 2 to 0 signal input from the system control
34
NO USE
O
Not used. (Open)
35
SDIN
I
Not used. (Connect to VSS)
36
SCS_N
I
Not used. (Fixed at H)
37
SCLK
I
Not used. (Connect to VSS)
38
SER_N
I
Not used. (Fixed at H)
39
RESET_N
I
Reset signal input from the system control (L: reset)
40
VSS
—
Ground
41
VDD
—
Power supply pin (+3.3 V)
42
NO USE
O
Not used. (Open)
43 to 47
MA1 to MA5
O
Address 1 to 5 signal output for the fl ash memory
48
VSS
—
Ground
49 to 54
MA6 to MA11
O
Address 6 to 11 signal output for the fl ash memory
55
VDD
—
Power supply pin (+3.3 V)
56
VSS
—
Ground
57 to 62
MA12 to MA17
O
Address 12 to 17 signal output for the fl ash memory
63
VSS
—
Ground
64 to 70
MA18 to MA24
O
Address 18 to 24 signal output for the fl ash memory
71
VDD
—
Power supply pin (+3.3 V)
72
VSS
—
Ground
73
MWE_N
O
Write enable signal output for the fl ash memory
74
MOE_N
O
Output enable signal output for the fl ash memory
75
MD15
I/O
Two-way data bus 15 input/output with the fl ash memory
76
MD7
I/O
Two-way data bus 7 input/output with the fl ash memory
77
MD14
I/O
Two-way data bus 14 input/output with the fl ash memory
78
MD6
I/O
Two-way data bus 6 input/output with the fl ash memory
79
MD13
I/O
Two-way data bus 13 input/output with the fl ash memory
80
MD5
I/O
Two-way data bus 5 input/output with the fl ash memory
81
VSS
—
Ground
82
VDD
—
Power supply pin (+3.3 V)
83
MD12
I/O
Two-way data bus 12 input/output with the fl ash memory
84
MD4
I/O
Two-way data bus 4 input/output with the fl ash memory
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