Read Sony HBD-E385 / HBD-E390 / HBD-T39 Service Manual online
HBD-E385/E390/T39
67
Pin No.
Pin Name
I/O
Description
N9
NO_USE
-
Not used
N10
DGND12_K
-
Digital ground
N11
DGND12_K
-
Digital ground
N12
NO_USE
-
Not used
N13
DGND12_K
-
Digital ground
N14
NO_USE
-
Not used
N15
DGND12_K
-
Digital ground
N16
DGND12_K
-
Digital ground
N17
DVCC12_K
-
1.2V digital power
N18
DVCC12_K
-
1.2V digital power
N19
DDRVCCIO
-
1.5 V digital IO power
N20
DDRVCCIO
-
1.5 V digital IO power
N21
NO_USE
-
Not used
N22
DGND12_K
-
Digital ground
N23
DGND12_K
-
Digital ground
N24
RDQS1_
I/O
Memory negative data strobe bit 1
N25
RDQS1
I/O
Memory positive data strobe bit 1
P1
NO_USE
-
Not used
P2
FETRAYPWM
O
Tray DAC / PWM control input. Controlled by uP.
P3
FEDMO
O
Disk motor control output. DAC output.
P4
NO_USE
-
Not used
P5
NO_USE
-
Not used
P6
NO_USE
-
Not used
P7
NO_USE
-
Not used
P8
NO_USE
-
Not used
P9
DVCC12_K
-
1.2V digital power
P10
DGND12_K
-
Digital ground
P11
NO_USE
-
Not used
P12
DGND12_K
-
Digital ground
P13
NO_USE
-
Not used
P14
DGND12_K
-
Digital ground
P15
NO_USE
-
Not used
P16
DGND12_K
-
Digital ground
P17
NO_USE
-
Not used
P18
DVCC12_K
-
1.2V digital power
P19
DDRVCCIO
-
1.5 V digital IO power
P20
NO_USE
-
Not used
P21
NO_USE
-
Not used
P22
NO_USE
-
Not used
P23
NO_USE
-
Not used
P24
RDQS0
I/O
Memory positive data strobe bit 0
P25
RDQS0_
I/O
Memory negative data strobe bit 0
R1
FE_FG
I/O
Motor Hall sensor input. The pin is spike-free at power-on stage.
R2
FEGIO0
I/O
LDD serial interface data. The pin is spike-free at power-on stage.
The pin is not allowed to pull-up in circuit layout.
General IO
The pin is not allowed to pull-up in circuit layout.
General IO
R3
NO_USE
-
Not used
R4
DGND12_K
-
Digital ground
R5
FEGIO9
I/O
General IO. The pin is spike-free at power-on stage.
General IO
General IO
R6
FEGIO4
O
Read gain switch 4
General IO
General IO
R7
NO_USE
-
Not used
R8
NO_USE
-
Not used
R9
NO_USE
-
Not used
R10
DGND12_K
-
Digital ground
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