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HCD-RH1000/RH7000
21
21
HCD-RH1000/RH7000
7-3. BLOCK DIAGRAM – AUDIO Section –
38 RIN2
7 LIN2
EAUAINL1
EAUAINR1
AUDIO INPUT SELECT,
A/D CONVERTER
IC201
M
TULI, TURI, EUAUINL1,
EUAUINR1, EUAUINL3, EUAUINR3
EUAUINR1, EUAUINL3, EUAUINR3
36 RIN1
9
21
LIN1
SDTO
TULI
TURI
3 LIN4
42 RIN4
1 LIN5
EAUAINL3
44 RIN5
EAUAINR3
J702 (2/2)
R
L
LINE 4 IN
AUDIO
J801 (2/2)
R
L
LINE OUT
AUDIO
5 LIN3
40 RIN3
J101 (2/2)
R
L (MONO)
LINE 2 IN
AUDIO
22
BICK
23
LRCK
ATA I/F
IC601 (2/3)
A12
C8
AUIA_DAT
A11 AUIA_BCK
A10 AUIA_LRCK
AUOA_CH12
E11
AUO_DO
B9
AUOA_BVK
N
SCIF2_SDO, SCIF2_SCK, XDSRCS,
XAMUTE, ADMUTE, XSWGBRST
XAMUTE, ADMUTE, XSWGBRST
F
PB_MCK_2, REC_MCK_1
A9
AUOA_LRCK
IT CPU
IC604 (1/3)
107
STR_DATA_OUT
116
STR_DATA_IN
1
STR_CLK
65
STR_CS
64
STR_BUSY
68
STR_MUTE_REQ
67
STR_POW_CNT
66
CN_DET
D/A CONVERTER
IC1402
3
12
SDTI
2 BICK
4 LRCK
AOUTL+
EUAUOUTL
EUAUOUTR
11
AOUTL–
10
AOUTR+
9
AOUTR–
16
DZFL
15
DZFR
AUDIO
OUT AMP
IC301
LVDS
TRANSCEIVER
IC2003
MUTE
Q311
MUTE CONTROL
Q305, 307, 309
MUTE
Q310
L
EUAUOUTL, EUAUOUTR
MUTE CONTROL
Q304, 306, 308
RESET SWITCH
Q315, 316
D304
D303
SPDIF+
SPDIF-
STR_DATA_OUT
STR_DATA_IN
10
11
8
9
STR_CLK
13
STR_BUSY
5
STR_CS
12
STR_MUTE_REQ
3
STR_POW_CONT
7
CN_DET
4
SYSTEM CONNCTER
CN2001
BUFFER
IC2001
8 CDTI
SCIF2_SDO
88 INSEL1
INSEL_1
89 INSEL2
INSEL_2
90 INSELTU
INSEL_TU
95 XP_MUTE
XP_MUTE
48 XFLMRST
XFLMRST5
1 MCLK
PB_MCK_2
7 CCLK
SCIF2_SCK
6 CSN
XDSRCS
5 PDN
XSWGBRST
24
28
MCLK
SEL0
REC_MCK_1
INSEL_1
29
SEL1
INSEL_2
30
SEL2
INSEL_TU
27 SMUTE
ADMUTE
25 PDN
XSWGBRST
XPMUTE
XFLMRST5
XAMUTE
: REC (AUDIO)
SIGNAL PATH
: PB (AUDIO)
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