LC-52X20E (serv.man5). Major IC Informations - Sharp TV Service Manual (repair manual). Page 27

LC-42XL2E/S/RU, LC-46XL2E/S/RU, LC-46X20E/S/RU, LC-52XL2E/S/RU, LC-52X20E/S/RU

5 – 27

D12

POD_CE1

O

Card enable.

E12

POD_CTX

O

POD OOB TX Gapped Symbol clock.

A11

POD_DRX

O

POD OOB RX data.

B11

POD_CD1

I

Card Detect.

C11

POD_IREQ

I

Ready/IRQ

D11

POD_CRX

O

POD OOB RX Gapped clock.

E11

POD_RESET

O

POD Card reset signal.

A10

POD_QTX

I

POD OOB TX Q Channel.

B10

POD_VS1

I

Card voltage Sense.

C10

POD_ETX

I

POD OOB TX enable.

D10

POD_CD2

I

Card Detect.

E10

POD_CE2

O

Card enable.

A9

POD_VPP_EN

O

Slot VPP enable.

B9

POD_OVERLOAD

I

Current overload detect.

C9

POD_VPP_EN#

O

Slot VPP enable.

D9

POD_VCC_EN#

O

Slot VCC enable.

E9

POD_VCC_EN

O

Slot VCC enable.

A8

POD_A9

O

POD Host interface address bit 9.

B8

POD_A8

O

POD Host interface address bit 8.

C8

POD_A7

I/O

POD Host interface address bit 7.

D8

POD_A6

I/O

POD Host interface address bit 6.

D7

POD_A5

I/O

POD Host interface address bit 5.

C7

POD_A4

O

POD Host interface address bit 4.

VDA Interface
AP13, AN13, AM13, AL13, 
AK13, AP14, AN14, AM14, 
AL14, AK14

VDA_R[9:0]

I

Video input, R channel. (Not used)

AP15, AN15, AM15, AL15, 
AK15, AM16, AL16, AK16, 
AP17, AN17

VDA_B[9:0]

I

Video input, B channel. (Not used)

AM17, AL17, AK17, AP18, 
AN18, AM18, AL18, AK18, 
AP19, AN19

VDA_G[9:0]

I

Video input, G channel. (Not used)

AP16

VDA_CLK

I

Video input, Clock. (Not used)

AM19

VDA_VS

I

Video input, Vertical sync. (Not used)

AL19

VDA_HS

I

Video input, Horizontal sync. (Not used)

AK19

VDA_DE

I

Video input, Data enable. (Not used)

VDB Interface, EJTAG, IDE and POD2 share with VDB
AK20

VDB_DE

I/O

Video input/output; data enable;
IDE: IDE bus interrupt.
EJTAG: NOP
POD2: POD_CE2B#, the second POD Card enable.

AL20

VDB_HS

I/O

Video input/output; Horizontal sync;
IDE: PDLAGCBLID, Passed diagnostics, cable assembly type identifier.
EJTAG: TDI2, TDI EJTAG input of slave CPU.
POD2: POD_A_B5, the second POD host interface address bit 5.

AM20

VDB_VS

I/O

Video input/output; Vertical sync;
IDE: DMAREQ, IDE bus DMA request.
EJTAG: NOP
POD2: POD_A_B4, the second POD host interface address bit 4.

AN20

VDB_G0

I/O

Video input/output; Green channel bit 0;
IDE: IDE data bus bit 0.
EJTAG: TDO2, TDO EJTAG input of slave CPU CPU.
POD2: POD_A_B6, the second POD host interface address bit 6.

AP20

VDB_G1

I/O

Video input/output; Green channel bit 1;
IDE: IDE data bus bit 1.
EJTAG: TMS2, TMS EJTAG input of slave CPU CPU.
POD2: POD_A_B7, the second POD host interface address bit 7.

AK21

VDB_G2

I/O

Video input/output; Green channel bit 2;
IDE: IDE data bus bit 2.
EJTAG: TCK2, TCK EJTAG input of slave CPU CPU.
POD2: POD_A_B8, the second POD host interface address bit 8.

AL21

VDB_G3

I/O

Video input/output; Green channel bit 3;
IDE: IDE data bus bit 3.
EJTAG: DCLK EJTAG output of both CPU CPUs.
POD2: POD_A_B8, the second POD host interface address bit 9.