LC-37X20E. Major IC Information - Sharp TV Service Manual (repair manual). Page 2

LC-32X20E/S/RU, LC-37X20E/S/RU

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Sil9185 is a 3-input/1-output switch compatible with HDMI1.3.

• Built in Consumer Electronics Control (CEC) support

• Individual control of Hot Plug Detect (HPD) for each port

• 5V detect to help speed soft mute of audio during plug-in, plug-out conditions

• Control via local I2C bus.

• Supports video resolutions up to 1080p, 60Hz, 12-bit or 720p/1080i, 120Hz, 12-bit

• Built-in adaptive equalizer provides long cable support even at deep color resolutions

• Pre-emphasis in transmitter

• DVI 1.0, HDCP 1.1 and HDMI 1.3 compliant receiver and transmitter

This IC performs the CPLD (Complex Programmable Logic Device) RESET, I/O and Bus control.

HIDTVPro-LX Digital AV decoder & Main CPU.

• Master CPU with MMU.

• DDR2 memory up to 256mHz.

• Two Transport stream inputs, DVB compliant.

• Two HD MPEG2 video decoders.

• Demux, supports two TS inputs and one PS input.

• DVB_CI, up to two PCMCIA slots for CAM cards.

• DVB/DES.

• AC3/MPEG2/MP3/AAC 

⋅ ⋅ ⋅ audio.

• 1920 x 1080p de-interlacing.

• Graphics engine.

• Two video planes and graphics planes with Alpha blender, overlay, scrolling, flashing, colour key, ARB support.

• Smart-Cards/UART/infrared IR/RTC/two HW timers/interrupt/Key button ADCs.

• Flash/IDE/PCI Host.

• Audio interface: AC97 link/I2S_out/I2S_in/SPDIF and lip-sync.

• Digital 24-bit RGB/YUV inputs.

• Dual port/Single port LVDS output.

• USB2.0 HOST/PHY built with EHCI.

• CVBS/S-video/YCbCr output.

• Two HD, 1920 x 1080p.

128Mbit Flash memory.

3.0V single power supply, page mode flash memory. It memorizes the program and broadcast data area.

The ICS275 field programmable VCXO clock synthesizer generates up to four high-quality, high-frequency clock outputs including multiple reference
clocks from a low-frequency crystal input. Using ICS’ VersaClockTM software to configure PLLs and outputs, the ICS275 contains a One-Time Pro-
grammable (OTP) ROM for field programmability. Programming features include VCXO, eight selectable configuration registers and up to two sets of
two low-skew outputs.

Using Phase-Locked Loop (PLL) techniques, the device runs from a standard fundamental mode, inexpensive crystal, or clock. 

4M x 16Bit x 4 Banks graphic DDR2 Synchronous DRAM with Differential Data Strobe.

Program, DTV video buffer.