Read Sharp LC-37X20E Service Manual online
LC-32X20E/S/RU, LC-37X20E/S/RU
5 – 10
2.6.2 Pin Connections and short description
Pin No.
Pin Name
I/O
Pin Function
1
PVDD
—
PLL Power supply, 4.5V~5.5V.
2
RX0
I
Receiver Channel 0 (Internal biased pin. Internally biased at PVDD/2).
3
I2C
I
Control Mode Select.
“L”: 4-wire Serial, “H”: I2C Bus
“L”: 4-wire Serial, “H”: I2C Bus
4
RX1
I
Receiver Channel 1.
5
RX2
I
Receiver Channel 2.
6
RX3
I
Receiver Channel 3.
7
INT
O
Interrupt
8
DZF
O
Zero Input Detect.
When the input data of DAC follow total 8192 LRCK cycles with “0” input data, this pin goes to “H”. And
when RSTN1 bit is “0”, PWDA bit is “0”, this pin goes to “H”
When the input data of DAC follow total 8192 LRCK cycles with “0” input data, this pin goes to “H”. And
when RSTN1 bit is “0”, PWDA bit is “0”, this pin goes to “H”
9
CDTO
O
Control Data Output in Serial Mode and I2C pin = “L”.
10
LRCKB
I/O
Channel Clock B
11
BICKB
I/O
Audio Serial Data Clock B
12
SDTOB
O
Audio Serial Data Output B
13
OLRCKA
I/O
Output Channel Clock A
14
ILRCKA
I/O
Input Channel Clock A
15
BICKA
I/O
Audio Serial Data Clock A
16
SDTOA
O
Audio Serial Data Output A
17
MCKO
O
Master Clock Output
18
TVDD
—
Output Buffer Power Supply, 2.7V~5.5V
19
DVSS
—
Digital Ground
20
DVDD
—
Digital Power Supply, 4.5V~5.5V
21
XTI
I
X’tal Input
22
XTO
O
X’tal Output
23
TX
O
Transmit Channel Output
When DIT bit = “0”, RX0~3 Through.
When DIT bit = “1”, Internal DIT Output.
When DIT bit = “0”, RX0~3 Through.
When DIT bit = “1”, Internal DIT Output.
24
MCLK2
I
Master Clock Input
25
PDN
I
Power-Down Mode & Reset
When “L”, the AK4683 is powered-down, all registers are reset. And then all digital output pins go “L”.
The AK4683 must be reset once upon power-up.
When “L”, the AK4683 is powered-down, all registers are reset. And then all digital output pins go “L”.
The AK4683 must be reset once upon power-up.
26
SDA
I/O
Control Data in Serial Mode and I2C pin = “H”.
27
SCL
I
Control Data Clock in Serial Mode and I2C pin = “H”.
28
CSN
I
Chip Select in Serial Mode and I2C pin = “L”.
29
SDTIA1
I
Audio Serial Data Input A1
30
SDTIA2
I
Audio Serial Data Input A2
31
SDTIA3
I
Audio Serial Data Input A3
32
SDTIB
I
Audio Serial Data Input B
33
HVDD
—
HP Power Supply, 4.5V~5.5V
34
HVSS
—
HP Ground
35
HPR
O
HP Rch Output.
36
HPL
O
HP Lch Output.
37
MUTET
—
HP Common Voltage Output
38
LOUT2
O
DAC2 Lch Positive Analog Output
39
ROUT2
O
DAC2 Rch Positive Analog Output
40
LOUT1
O
DAC1 Lch Positive Analog Output
41
ROUT1
O
DAC1 Rch Positive Analog Output
42
VCOM
—
DAC/ADC Common Voltage Output
43
AVDD2
—
DAC Power Supply, 4.5V~5.5V
44
AVSS2
—
DAC Ground
45
LISEL
O
Lch Feedback Resistor Output
46
LOPIN
O
Lch Feedback Resistor Input. 0.5 x AVDD1.
47
ROPIN
O
Rch Feedback Resistor Input. 0.5 x AVDD1.
48
RISEL
O
Rch Feedback Resistor Output
49
AVSS1
—
ADC Ground
50
AVDD1
—
ADC Power Supply, 4.5V~5.5V
51
LIN1
I
Lch Input 1
52
RIN1
I
Rch Input 1
53
LIN2
I
Lch Input 2
54
RIN2
I
Rch Input 2
55
LIN3
I
Lch Input 3
56
RIN3
I
Rch Input 3
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