Read Sharp LC-37AD1E (serv.man10) Service Manual online
62
62-1
62-2
LC-37AD1E
Pin No
.
Pin Name
I/O
Pin Function
52
XTAL2
O
Output of the inverting oscillator amplifier.
53
XTAL1
I
Input of the inverting oscillator amplifier.
57
R
O
Red
58
G
O
Green
59
B
O
Blue
60
BLANK/COR
O
Contrast reduction and blanking.
64
WR
O
Control output; indicates a write access to the internal XRAM; can be used as a
write strobe for writing data into an external data RAM by a MOVX instruction.
This signal is also available as P4.3.
65
RD
O
Control output; indicates a read access to the internal XRAM; can be used for
latching data from the data bus into an external data RAM by a MOVX
instruction.
This signal is also available as P4.2.
72
FL_PGM
I
All the pins prefix by Flax are test pins which must be left open.
80
FL_RST
I
All the pins prefix by Flax are test pins which must be left open.
87
ALE
O
Address Latch Enable.
88
PSEN
O
Program Store Enable
is a control output signal which is usually connected to OE input line of the
external program memory to enable the data output.
95
FL_CE
I
All the pins prefix by Flax are test pins which must be left open.
6,73
VDD2.5
—
Supply voltage (2.5V).
22,56
VDDA2.5
—
Supply voltage for analog components (2.5V).
8,40,75,92
VDD3.3
—
Input/output (3.3V).
7,39,74,91,
VSS
—
Ground (0V).
23,55
VSSA
—
Ground for analog components.
28,51,54,61,63,66
——
Ë
HI62S8308X-1Q(ASSY:IC1603)
256K X 8-bit Low Voltage CMOS SRAM
»
Block Diagram
Pin No
.
Pin Name
I/O
Pin Function
»
Pin Function
1-4,7,
A0-A17
I
A
ddress Inputs
9-20,31
5
W
E
I
Write Enable
6
CE2
I
C
hip Enable2
8
VCC
—
Device Power Supply
21-23,
I/O0-I/O7
I/O
Data Inputs/Outputs
25-29
24
GND
—
Ground
30
CE1
I
Chip Enable1
32
OE
O
Output Enable
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