LC-32P70E (serv.man10). Major ICs information - Sharp TV Service Manual (repair manual). Page 39

 7368868E

STMicroelectronics Confidential

37/709

Confidential

Bit 0

SC0_DATAOUT or ASC0_TXD

a

Bit 1

SC0_DATAIN or ASC0_RXD

a

Bit 2

SC0_CG_EXTCLK

Bit 3

SC0CG_CLK or SMCDSS_CLK

b

Bit 4

(SCO_RESET)

Bit 5

(SC0_NOT_SETVCC)

Bit 6

SC0_DIR or ASC0_NOTOE

c

,

(SC0_NOT_SETVPP)

Bit 7

(SC0_DETECT)

a. ASC0 TX/RX data becomes smartcard TX/RX data when the ASC module is used in

smartcard mode.

b. Output function between PIO or smartcard module clock generator alternate function and

clock generator module frequency synthesizer clock is selected by bit 28 in the interconnect
register CONFIG_CONTROL_A (SMCARDA_DSSSMCLK_NOT_PIOBIT3). If the DSS
smartcard mode is selected (bit 28 = 1), this overrides the normal PIO or PIO alternate
function output.

c. When ASC0 is used in nonsmartcard mode, the smartcard direction signal becomes an active

low ASC TX output enable signal. The signals are in fact the same, that is, SC0_DIR = 0
means smartcard TX is active.

Bit 0

SC1_DATAOUT or ASC1_TXD

a

Bit 1

SC1_DATAIN or ASC1_RXD

a

Bit 2

SC1_CG_EXTCLK

Bit 3

SC1CG_CLK or SMCDSS_CLK

b

Bit 4

 (SC1_RESET)

Bit 5

YC[1]

YC[1], (SC1_NOT_SETVCC)

Bit 6

SC1_DIR or ASC1_NOTOE

c

,

(SC1_NOT_SETVPP)

Bit 7

YC[0] (SC1_DETECT)

YC[0]

a. ASC1 TX/RX data becomes smartcard TX/RX data when the ASC module is used in

smartcard mode.

b. Output function between PIO or smartcard module clock generator alternate function and

clock generator module frequency synthesizer clock is selected by bit 29 in the interconnect
register CONFIG_CONTROL_A (SMCARDB_DSSSMCLK_NOT_PIOBIT3). If the DSS
smartcard mode is selected (bit 29 = 1) this overrides the normal PIO or PIO alternate function
output.

c. When ASC1 is used in nonsmartcard mode the smartcard direction signal becomes an active

low ASC TX output enable signal. The signals are in fact the same, that is, SC1_DIR = 0
means smartcard TX is active.