Read Sharp LC-13C2E (serv.man2) Service Manual online
10
LC-13B2H/M
LC-15B2H/M
LC-20B2H/M
LC-15B2H/M
LC-20B2H/M
3-4. Component signal processing circuit
The component signal from the analog board is inputted to the input port (
4
,
5
,
6
) of IC801 (video decoder).
The video signal (pin (70)) outputted from IC801 is subjected to sync separation in Q401 (buffer) and IC401
(sync separator) and then inputted to the CSYNC port (
(sync separator) and then inputted to the CSYNC port (
6
) of IC2001.
The component signal inputted to IC801 is AD-converted in the IC and then inputted to IC1201 (LCD controller).
From CVIN and CSYNC inputted to IC2001, CK, VD, HD, OSD-RGB, MPCLK, MPDA and MPCS are outputted
to IC1201. At the same time, MPDA and MPCLK are inputted to the gray level circuit.
The component signal inputted to IC1201 is RGB-converted in the IC and then outputted to the LCD panel. At
the same time, GCK is inputted to IC1203, IC1204 and IC1205 (gate control) and then outputted to the LCD
panel.
From CVIN and CSYNC inputted to IC2001, CK, VD, HD, OSD-RGB, MPCLK, MPDA and MPCS are outputted
to IC1201. At the same time, MPDA and MPCLK are inputted to the gray level circuit.
The component signal inputted to IC1201 is RGB-converted in the IC and then outputted to the LCD panel. At
the same time, GCK is inputted to IC1203, IC1204 and IC1205 (gate control) and then outputted to the LCD
panel.
BUFFER
Q402
SYNC
SEPARATER.
IC401
BUFFER
Q401
COMPONENT
INPUT
YPbPr
VIDEO
DECODER
(VPC)
IC801
IC801
I
2
C
Y, PB, PR
VOUT
3.3V REG.
CSYNC0
CVIN
MPU
IC2001
Data, clock, etc. are inputted.
AD-converted
data is inputted.
data is inputted.
1-5. LCD
CONTROLLER
CIRCUIT
LCD
PANEL
RGB-converted
data is outputted.
data is outputted.
OSD data etc. is inputted.
1-3. GRAY
LEVEL
CIRCUIT
Gray level reference
voltages and electrode
signals are outputted.
voltages and electrode
signals are outputted.
Fig. 3-5. Component signal processing circuit
3-5. LCD controller circuit
The Y/UV signal from IC801 and the VD, HD, BK, CK and OSD-RGB signals for OSD inputted to pins (95), (97),
(21), (17) and (32) thru (34) from IC2001 are subjected to RGB conversion, PAL pixel skipping 7-6 line conver-
sion and 8-6 bit conversion in IC1201 and then outputted as RGB 6-bit data to the LCD panel (R0-5: pins (89)
thru (86), G0-5: pins (98) thru (93), B0-5: pins (108) thru (103)).
The LCD controller also outputs the timing signal at the time of vertical and horizontal reverse display control
and light control.
(21), (17) and (32) thru (34) from IC2001 are subjected to RGB conversion, PAL pixel skipping 7-6 line conver-
sion and 8-6 bit conversion in IC1201 and then outputted as RGB 6-bit data to the LCD panel (R0-5: pins (89)
thru (86), G0-5: pins (98) thru (93), B0-5: pins (108) thru (103)).
The LCD controller also outputs the timing signal at the time of vertical and horizontal reverse display control
and light control.
VIDEO
DECODER
IC801
FIFO
IC1202
LCD
CONTROLLER
IC1201
GATE
CONTROL
IC1203
IC1204
IC1205
IC1204
IC1205
MPU
IC2001
VSY, HSY, FIELD, VACT,
UV0-7 (
UV0-7 (
7
–
0
)
R0-5 (
q
–
r
), G0-5, B0-5
CK, SPIO, SPOI, LBR, HG
CK, VD, HD, OSD-RGB
GCK
GCK
MPCS, MPCLK, MPDA
VP_Y0-7 (
3
–
6
)
LCD
PANEL
Fig. 3-7. LCD controller circuit
~ 3
thru
r
are waveform measurement points.
Click on the first or last page to see other LC-13C2E (serv.man2) service manuals if exist.