LC-13C2E (serv.man2). Technical Manual (tentative) - Sharp TV Service Manual (repair manual). Page 9

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9
LC-13B2H/M
LC-15B2H/M
LC-20B2H/M
Fig. 3-3. Video signal processing circuit
AV1
S-VIDEO
INPUT
V1
V2
AV2
INPUT
OUTPUT
VIDEO
SWITCH
IC402
V
SY, SC
VIDEO
IN/OUT
SWITCH
Q3501-
Q3503
V0
CVIN
CSYNC0
BUFFER
Q402
BUFFER
Q401
SYNC
SEPARATER.
IC401
MPU
IC2001
VOUT
I
2
C
3.3V REG.
VIDEO
DECODER
(VPC)
IC801
LCD
PANEL
AD-converted 
data is inputted.
Data, clock, etc. 
are inputted.
OSD data etc. is inputted.
1-3. GRAY LEVEL
CIRCUIT
1-5. LCD
CONTROLLER
CIRCUIT
RGB-converted 
data is outputted.
Gray level reference 
voltages and electrode 
signals are outputted.
The video signal or Y/C signal inputted to IC801 is AD-converted in the IC and subjected to various video
adjustments in digital signal processing.  As a Y/UV digital signal (ITU-R601 format) the Y data is outputted from
pins (31) thru (34) and (37) thru (40) and the C data (UV data) is outputted from pins (41) thru (44) and (47) thru
(50), and then they are inputted to the LCD controller circuit.
CIN
VIN1
VIN2
VIN3
VIN4
VOUT
RGB/
YCrCb
RGB/
YCrCb
FB
Analog
Front-end
AGC
2
×
ADC
Analog
Component
Front-end
4
×
ADC
Processing
Matrix
Contrast
Saturation
Brightness
Tint
Adaptive
Comb
Filter
NTSC
PAL
Color
Decoder
NTSC
PAL
SECAM
Saturation
Tint
Mixer
2D Scaler
PIP
Pehorame
Mode
Contrast
Brightness
Peaking
Output
Formatter
ITU-R656
ITU-R601
Memory
Control
Y
Cr
Cb
Y
Cr
Cb
Y/G
Y
Cr
Cb
FB
U/B
V/R
FB
Y OUT
Cr Cb
OUT
YCOE
FIFO
CNTL
LL Clock
H Sync
V Sync
AVO
I
2
C Bus
I
2
C Bus
Clock
Gen.
Sync
+
Clock
Generation
20.25MHz
Fig. 3-4. Block diagram of the VPC3230D (IC801)
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